SBVA092 June   2022 TPS7A14

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 TPS7A14 Functional Block Diagram
    2. 1.2 Biasing Rail for NMOS LDO
  4. 2Design and Considerations to Check
    1. 2.1 Configuring External Resistor Network
    2. 2.2 Feed-forward Capacitor for Loop Stability
    3. 2.3 IR Drop Compensation by Remote_Sense
  5. 3Stability Verification
    1. 3.1 Simulated Bode Plot vs. Evaluated Bode Plot
    2. 3.2 Transient Response in Time Domain
  6. 4Summary
  7. 5References

2.3 IR Drop Compensation by Remote_Sense

SENSE pin monitors Vout and helps control loop compensate voltage drop caused by the parasitic resistance resident on trace from OUT pin terminal to actual point of loads. This feature is useful when the load is placed a bit far from OUT pin and is to provide accurate output level to the load which minimizes the IR drop impact. Figure 2-2 illustrates the function.

Figure 2-2 IR Drop Compensation by Remote_Sense

As shown in Figure 2-3, flexible schematic change for adjustable Vout can pursue same functioning through connecting the VFB node from the point of load. Note that placing resistor network is recommended to be close to SENSE pin while the remote sensing trace requires Kelvin connection in care.

Figure 2-3 IR Drop Compensation by Remote_Sense with Resistor Network