The standard internal current limit circuit of LDO regulators uses a sense FET with a series resistor at its source. This series resistor (R_S) senses the current flowing through the internal passFET. The CL sense point goes to a differential state by comparing against another reference value, where current limit sense is V_IN – V_{CL_SENSE}. Therefore, the voltage drop across resistor R_S determines if the current limit is engaged or not in order to regulate the output current within a given range of I_Cl..

During dropout operation (V_IN<V_OUT(NOM)+V_DO), the sensed current decreases, due to a decrease of V_DS across the sense FET. This reduction in sense current requires the output current to increase before the current limit circuit takes over and starts regulating the current.