SBVS066S December   2005  – November 2024 TPS74401

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable, Shutdown
      2. 6.3.2 Power-Good (VQFN Package Only)
      3. 6.3.3 Internal Current Limit
      4. 6.3.4 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
    5. 6.5 Programming
      1. 6.5.1 Programmable Soft-Start
      2. 6.5.2 Sequencing Requirements
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Input, Output, and Bias Capacitor Requirements
      2. 7.1.2 Transient Response
      3. 7.1.3 Dropout Voltage
      4. 7.1.4 Output Noise
    2. 7.2 Typical Applications
      1. 7.2.1 Setting the TPS74401
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Using an Auxiliary Bias Rail
      3. 7.2.3 Without an Auxiliary Bias
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Power Dissipation
        2. 7.4.1.2 Thermal Considerations
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
      2. 8.1.2 Device Nomenclature
    2. 8.2 Device Support
      1. 8.2.1 Development Support
        1. 8.2.1.1 Evaluation Modules
        2. 8.2.1.2 Spice Models
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.4.1.2 Thermal Considerations

A better method of estimating the thermal measure comes from using the thermal metrics ΨJT and ΨJB, as shown in the Thermal Information table. These metrics are a more accurate representation of the heat transfer characteristics of the die and the package than RθJA. The junction temperature can be estimated with the corresponding formulas given in Equation 8.

Equation 8. Ψ J T :   T J = T T + Ψ J T × P D
Ψ J B :   T J = T B + Ψ J B × P D

where

  • PD is the power dissipation shown by Equation 8,
  • TT is the temperature at the center-top of the IC package, and
  • TB is the PCB temperature measured 1mm away from the IC package on the PCB surface (see Figure 7-15).

 

Note:

Both TT and TB can be measured on actual application boards using a thermo‐gun (an infrared thermometer).

For more information about measuring TT and TB, see the Using New Thermal Metrics application note.

TPS74401 Measuring Points for TT and TB
A. TT is measured at the center of both the X- and Y-dimensional axes.
B. TB is measured below the package lead on the PCB surface.
Figure 7-15 Measuring Points for TT and TB

Compared with θJA, the thermal metrics ΨJT and ΨJB are less independent of board size, but do have a small dependency on board size and layout. Figure 7-16 shows characteristic performance of ΨJT and ΨJB versus board size.

Referring to Figure 7-16, the RGW package thermal performance has negligible dependency on board size. The KTW package, however, does have a measurable dependency on board size. This dependency exists because the package shape is not point symmetric to an IC center. In the KTW package, for example (see Figure 7-15), silicon is not beneath the measuring point of TT which is the center of the X and Y dimension, so that ΨJT has a dependency. Also, because of that non-point symmetry, device heat distribution on the PCB is not point symmetric either, so that ΨJB has a greater dependency on board size and layout.

TPS74401 ΨJT and ΨJB versus Board Size Figure 7-16 ΨJT and ΨJB versus Board Size

For a more detailed description of why TI does not recommend using θJC(top) to determine thermal characteristics, see the Using New Thermal Metrics application note. Also, see the IC Package Thermal Metrics application note for further information.