SBVS162B March   2011  – July 2015 TPS7A4001

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Enable Pin Operation
      3. 7.3.3 Thermal Protection
      4. 7.3.4 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Capacitor Recommendations
        2. 8.2.2.2 Input and Output Capacitor Requirements
        3. 8.2.2.3 Bypass Capacitor Requirements
        4. 8.2.2.4 Transient Response
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

DGN Package
8-Pin HVSSOP
Top View
TPS7A4001 po_dgn_bvs162.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
OUT 1 O Regulator output. A capacitor > 4.7 µF must be tied from this pin to ground to assure stability.
FB 2 O This pin is the input to the control-loop error amplifier. It is used to set the output voltage of the device.
NC 3 Not internally connected. This pin must either be left open or tied to GND.
6
7
GND 4 Ground
EN 5 I This pin turns the regulator on or off.
If VEN ≥ VEN_HI the regulator is enabled.
If VEN ≤ VEN_LO, the regulator is disabled.
If not used, the EN pin can be connected to IN. Make sure that VEN ≤ VIN at all times.
IN 8 I Input supply
PowerPAD Solder to printed-circuit-board (PCB) to enhance thermal performance.
NOTE: The PowerPAD is internally connected to GND.
Although it can be left floating, TI highly recommends connecting the PowerPAD to the GND plane.