SBVS414 November   2021 TPS7H1210-SEP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Enable Pin Operation
      3. 7.3.3 Programmable Soft-Start
      4. 7.3.4 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Operation
      2. 8.1.2 Capacitor Recommendations
      3. 8.1.3 Noise Reduction and Feed-Forward Capacitor Requirements
      4. 8.1.4 Power-Supply Rejection Ratio (PSRR)
      5. 8.1.5 Output Noise
      6. 8.1.6 Transient Response
      7. 8.1.7 Post DC-DC Converter Filtering
      8. 8.1.8 Power for Precision Analog
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don’ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Improve PSRR and Noise Performance
    2. 10.2 Layout Example
    3. 10.3 Thermal Performance
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Spice Models
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

3 Description

The TPS7H1210-SEP negative voltage linear regulator is a low noise, high PSRR regulator capable of sourcing a maximum load of 1 A.

The regulator include a CMOS logic-level-compatible enable pin (EN) to allow for user-customizable power management schemes. Other features include built-in current limit and thermal shutdown to protect the device and system during fault conditions.

The TPS7H1210-SEP device is designed using bipolar technology primarily for high-accuracy, low-noise applications, where clean voltage rails are critical to maximize system performance. Therefore, it ideal to power op amps, ADCs, DACs, and other high-performance analog circuitry.

Additionally, the TPS7H1210-SEP device is suitable for post DC-DC converter regulation. By filtering the output voltage ripple inherent to DC-DC switching conversion, maximum system performance is ensured in sensitive devices and RF applications.

Device Information
PART NUMBER(1)GRADEPACKAGE(2)
TPS7H1210MRGWSEP20 krad(Si) RLAT, 30 krad(Si) characterizedVQFN (20)
5.00 mm × 5.00 mm
Mass = 83.6 mg
TPS7H1210EVM Evaluation board EVM
(1) For all available packages, see the orderable addendum at the end of the data sheet.
(2) Dimensions and mass are nominal values.
GUID-20210408-CA0I-1174-RX8F-SFZ9RX3NVDQX-low.png Typical Application Schematic