SBVU068 august 2023 TPS7A78
The TPS7A78 device has two open-drain signals (power-good and power-fail) that are both pulled up to VLDO_IN by default. Because of the high-impedance open-drain logic, the AC supply frequency noise can be present on those signals when pulled high. A low-impedance digital buffer isolation circuit is recommended, such as the U2 device that is depopulated on the default EVM setup, to obtain noise-free PG ans PF signals. Jumpers J16 and J18 connect the device PG and PF signals directly to the TP11 and TP9 test points because the digital buffer circuit is not populated with the default EVM setting.