SBVU076 April 2022
The TPS7A74EVM-068 evaluation module contains an optional high-performance load transient circuit to allow efficient testing of the TPS7A74 LDO load transient performance. To use the optional load transient circuit, install the correct components in accordance with the application. Modify the input and output capacitance connected to the TPS7A74 LDO to match the expected operating conditions. Determine the desired peak current to test, and modify the parallel resistor combination of R12, R13, R14, R15, and R16 as shown:
The slew rate of the load step can be adjusted by C17, R17, R18, and R20. In this section, only R18 and R20 are adjusted to set the slew rate. For a 0-mA to 1.5-A to 0-mA load step, use Table 2-1 to select a value of R18 and R20 that results in the desired rise or fall time.
R18 | R20 | Rise, Fall Time |
---|---|---|
90.9 kΩ | 97.6 kΩ | 12 µs |
44.2 kΩ | 47.5 kΩ | 6 µs |
28 kΩ | 23.2 kΩ | 3 µs |
14 kΩ | 12.1 kΩ | 1.5 µs |
6.65 kΩ | 5.9 kΩ | 750 ns |
3.24 kΩ | 2.49 kΩ | 300 ns |
1.43 kΩ | 1.21 kΩ | 150 ns |
After the EVM is modified (if needed), connect a power supply to banana connectors J24 (VDD) and J30 (GND) with a 5-V DC supply and a 1-A DC current limit. As illustrated in Figure 2-3 and Figure 2-4, the TPS7A74 transient response is very fast and the output voltage recovers in well under 1 ms after the initial load transient. Use a pulse-duration limit of 1 ms to prevent excessive heating of the pulsed resistors (R12, R13, R14, R15, and R16). Configure a function generator for the 50-Ω output, in a 0-V DC to 5-V DC square pulse. If necessary, burst mode can be configured in the function generator for repetitive, low duty cycle, load transient testing.
Use J16 to short R2 to GND and configure VOUT to be 1-V DC. The series combination of R1 and R2 provide 50-μA of DC load current. A 20-kΩ resistor is installed on the EVM at R18, and a 20-kΩ resistor is installed on the EVM at R20. These resistors provide approximately 0.75-A/μs slew rate from 0 mA to 1.5 A, and 0.5-A/μs slew rate from 1.5 A to 0 mA. Figure 2-3 and Figure 2-4 provide example test data with R18 = 20 kΩ and R20 = 20 kΩ. The orange trace is the input voltage, the green trace is the output voltage, and the red trace is the output current. R12, R13, R14, R15, and R16 provide 1.42 A of pulsed load. The resulting test data shows a 50-μA to 1.42-A load step on VOUT of the LDO, with only a 47-μF capacitor on the output of the LDO.