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SN74LVC112A Dual Negative-Edge-Triggered J-K Flip-Flop With Clear and Preset
SCAS289N
January 1993 – December 2024
SN74LVC112A
PRODUCTION DATA
CONTENTS
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SN74LVC112A Dual Negative-Edge-Triggered J-K Flip-Flop With Clear and Preset
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements, –40°C to +85°C
5.7
Timing Requirements, –40°C to +125°C
5.8
Switching Characteristics, –40°C to +85°C
5.9
Switching Characteristics, –40°C to +125°C
5.10
Operating Characteristics
5.11
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Receiving Notification of Documentation Updates
9.2
Support Resources
9.3
Trademarks
9.4
Electrostatic Discharge Caution
9.5
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
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SN74LVC112A Dual Negative-Edge-Triggered J-K Flip-Flop
With Clear and Preset