SCAS290T January 2015 – September 2024 SN74LVC125A
PRODUCTION DATA
This quadruple bus buffer gate is designed for 1.65V to 3.6V VCC operation.
The SN74LVC125A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V system environment.
PART NUMBER | PACKAGE(1) | PACKAGE SIZE(2) | BODY SIZE(3) |
---|---|---|---|
SN74LVC125A | BQA (WQFN, 14) | 3mm × 2.5mm | 3mm × 2.5mm |
D (SOIC, 14) | 8.6 mm × 6mm | 8.65mm × 3.91mm | |
DB (SSOP, 14) | 6.20mm × 7.8mm | 6.20mm × 5.30mm | |
NS (SOP, 14) | 10.2mm × 7.8mm | 10.30mm × 5.30mm | |
PW (TSSOP, 14) | 5.00mm × 6.4mm | 5.00mm × 4.40mm | |
RGY (VQFN, 14) | 3.50mm × 3.50mm | 3.50mm × 3.50mm |