SCASE14 September   2024 SN74AC3G98

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Electrical Characteristics
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 CMOS Schmitt-Trigger Inputs
      3. 7.3.3 Clamp Diode Structure
    4. 7.4 Device Functional Modes
    5. 7.5 Combinatorial Logic Configurations
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
      4. 8.2.4 Power Supply Recommendations
      5. 8.2.5 Layout
        1. 8.2.5.1 Layout Guidelines
        2. 8.2.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

5.6 Switching Characteristics

over operating free-air temperature range; CL = 50pF typical values measured at TA = 25°C (unless otherwise noted). See Parameter Measurement Information
PARAMETER FROM (INPUT) TO (OUTPUT) VCC -40°C to 125°C UNIT
MIN TYP MAX
tpd A Y 1.5V 38 ns
3.3V ± 0.3V 13.5 ns
5V ± 0.5V 9.9 ns
6V 8.4 ns
B Y 1.5V 36.4 ns
3.3V ± 0.3V 13.1 ns
5V ± 0.5V 9.6 ns
6V 8.1 ns
C Y 1.5V 38.9 ns
3.3V ± 0.3V 13.6 ns
5V ± 0.5V 9.8 ns
6V 8.2 ns
tsk(o) Q 1.5V 4 ns
6V 1 ns
CPD(1) CLK Q 5V 50 pF
(1) Power dissipation capacitance measured with CL = 50pF, F = 1MHz