SCDS432 June   2021 TMUX646

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 1.2-V Logic Compatible Inputs
      2. 8.3.2 Bidirectional Operation
      3. 8.3.3 Powered-Off Protection
      4. 8.3.4 Low Power Disable Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pin Functions
      2. 8.4.2 Low Power Disable Mode
      3. 8.4.3 Switch Enabled Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 MIPI D-PHY Application
        2. 9.2.2.2 MIPI C-PHY Application
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

7 Parameter Measurement Information

Figure 7-1 On Resistance
Figure 7-2 Off Leakage
Figure 7-3 On Leakage
A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω , tr = 3 ns, tf = 3 ns.
B. CL includes probe and jig capacitance.
Figure 7-4 tSWITCH Timing
A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω , tr = 3 ns, tf = 3 ns.
B. CL includes probe and jig capacitance.
Figure 7-5 tON and tOFF Timing for OE
GUID-964BFE01-DC7A-487C-85ED-0E915EA62E70-low.gifFigure 7-6 Off Isolation
GUID-C3D6CC5B-EFEE-467A-9BBB-B65E35479C39-low.gifFigure 7-7 Crosstalk
GUID-104A6B92-0527-4BAC-B368-91A3E2D120FF-low.gifFigure 7-8 Bandwidth and Insertion Loss
GUID-29F31E9B-7715-47A8-8FC3-852C8852F861-low.gifFigure 7-9 tPD, tSKEW(INTRA) and tSKEW(INTER) Setup
GUID-C4B10C70-B4D6-40B7-BF53-147CFC1C3C83-low.gif
A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω , tr = 100 ps, tf = 100 ps.
B. CL includes probe and jig capacitance.
Figure 7-10 tPD
GUID-6E1B8F3D-AEA5-467A-B567-22BC5122B420-low.gif
A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω , tr = 100 ps, tf = 100 ps.
B. CL includes probe and jig capacitance.
Figure 7-11 tSKEW(INTRA)
GUID-F5481E87-836C-45E7-966D-AB65A1833C07-low.gif
A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω , tr = 100 ps, tf = 100 ps.
B. CL includes probe and jig capacitance.
C. tSKEW is the maximum skew between all channels. The diagram exaggerates tSKEW to show the measurement technique.
Figure 7-12 tSKEW(INTER)
A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω , tr = 3 ns, tf = 3 ns.
B. CL includes probe and jig capacitance.
Figure 7-13 tBBM