SCDS445E May   2022  – September 2024 TMUX4051 , TMUX4052 , TMUX4053

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information: TMUX405x
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Electrical Characteristics
    6. 6.6 AC Performance Characteristics
    7. 6.7 Timing Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  Transition Time
    5. 7.5  Break-Before-Make
    6. 7.6  tON(EN) and tOFF(EN)
    7. 7.7  Propagation Delay
    8. 7.8  Charge Injection
    9. 7.9  Off Isolation
    10. 7.10 Crosstalk
    11. 7.11 Bandwidth
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Rail-to-Rail Operation
      3. 8.3.3 1.8V Logic Compatible Inputs
      4. 8.3.4 Device Functional Modes
      5. 8.3.5 Truth Tables
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
    3. 9.3 Design Requirements
    4. 9.4 Detailed Design Procedure
    5. 9.5 Application Curves
    6. 9.6 Power Supply Recommendations
    7. 9.7 Layout
      1. 9.7.1 Layout Guidelines
      2. 9.7.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.3.5 Truth Tables

Table 8-1, Table 8-2, and Table 8-3 provides the truth tables for the TMUX4051 respectively.

Table 8-1 TMUX4051 Truth Table
EN A2 A1 A0 Selected Signal Path Connected To Drain (D) Pin
0 0 0 0 S0
0 0 0 1 S1
0 0 1 0 S2
0 0 1 1 S3
0 1 0 0 S4
0 1 0 1 S5
0 1 1 0 S6
0 1 1 1 S7
1 X(1) X(1) X(1) All inputs are unselected (HI-Z)
(1) X denotes do not care.
Table 8-2 TMUX4052 Truth Table
EN A1 A0 Selected Signal Path Connected To Drain (DA and DB) Pins
0 0 0 S0A to DA
S0B to DB
0 0 1 S1A to DA
S1B to DB
0 1 0 S2A to DA
S2B to DB
0 1 1 S3A to DA
S3B to DB
1 X(1) X(1) All inputs are unselected (HI-Z)
(1) X denotes do not care.
Table 8-3 TMUX4053 Truth Table
EN SEL1 SEL2 SEL3 Selected Signal Path Connected To Drain Pins
0 0 X X S1A to D1
0 1 X X S1B to D1
0 X 0 X S2A to D2
0 X 1 X S2B to D2
0 X X 0 S3A to D3
0 X X 1 S3B to D3
1 X(1) X(1) X(1) All inputs are unselected (HI-Z)
(1) X denotes do not care.

The Enable pin, EN, of the TMUX405x devices have a weak internal pull-up resistor to put the devices into a disabled state upon power up. The SELx / Address pins (Ax) have weak internal pull-down resistors to put the switch into a defined logic state.