This document is the EVM user’s guide for the TMUXBQB-DYYEVM, which provides a quick way to evaluate TI devices that use a 16-pin BQB, DYY or PW package.
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This user's guide describes the TMUXBQB-DYYEVM evaluation module (EVM) and its intended use. This board allows for the quick prototyping and DC characterization of TI’s line of TMUX products that use 16-pin TSSOP (PW), WQFN (BQB) and SOT-23 THIN (DYY) packages.
The information in the warning statement is provided for personal protection and the information in the caution statement is provided to protect the equipment from damage. Read each caution and warning statement carefully.
The TMUXBQB-DYYEVM has the following features:
There are 16 headers located around the board with designators J1 through J16. These 3-by-2 headers serve as connections to power planes and to signals of the DUT (U1). Each pin of the DUT has similar header and test point configuration. At four different locations around the board, a legend shows the connections of the pins of the nearby five headers. Figure 4-1 shows a representation of the header associated with pin 3 of U1.
The silkscreen legend represents the connections of the pins of J2. Figure 4-2 shows the pin numbers of this header from this same perspective.
Table 4-1 also shows the connections.
Header pin number | Connection |
---|---|
1 | No connection |
2 | VDD |
3 | GND |
4 | U1 |
5 | GND |
6 | VSS |
For all headers J1 through J16, the connections are the same, but are rotated by a multiple of 90° according to their position on the board. A legend is included for each rotation.
In addition to headers, multiple test points are located around the board. Black test points (TP18 and TP20-TP26) are connected to GND, the red test point (TP17) is connected to VDD, and the green test point (TP19) is connected to VSS. The remaining blue test points (TP1-TP16 and TP101-TP116) are connected along the signal paths of the pins of U1.
Table 4-2 shows the test point connections.
Designator | Connection |
---|---|
TP1 | J1.4 |
TP2 | J2.4 |
TP3 | J3.4 |
TP4 | J4.4 |
TP5 | J5.4 |
TP6 | J6.4 |
TP7 | J7.4 |
TP8 | J8.4 |
TP9 | J9.4 |
TP10 | J10.4 |
TP11 | J11.4 |
TP12 | J12.4 |
TP13 | J13.4 |
TP14 | J14.4 |
TP15 | J15.4 |
TP16 | J16.4 |
TP17 | VDD |
TP18 | GND |
TP19 | VSS |
TP20 | GND |
TP21 | GND |
TP22 | GND |
TP23 | GND |
TP24 | GND |
TP25 | GND |
TP26 | GND |
TP101 | U1.1 |
TP102 | U1.2 |
TP103 | U1.3 |
TP104 | U1.4 |
TP105 | U1.5 |
TP106 | U1.6 |
TP107 | U1.7 |
TP108 | U1.8 |
TP109 | U1.9 |
TP110 | U1.10 |
TP111 | U1.11 |
TP112 | U1.12 |
TP113 | U1.13 |
TP114 | U1.14 |
TP115 | U1.15 |
TP116 | U1.16 |
Terminal block J18 is the power input for the board. Three power rails (VSS, GND, and VDD) are labeled on the board’s silkscreen layer, indicating the identities of the input pins of the header. Connect the power supply rails at this terminal block to power the board.
The TMUXBQB-DYYEVM will not have any device connected at footprint U1, and there are not any devices included with the EVM for this footprint. Attach any compatible Texas Instruments TMUX device to this location, which will serve as the Device Under Test (DUT). Compatible devices include 16-pin parts with PW, BQB or DYY package names.
The headers of the TMUXBQB-DYYEVM can be easily connected to a power rail using 2.54 mm shunts on J1-J16, not included with the board. Connecting the shunt between pin 4 of the header and pin 3 (GND) to connect the corresponding pin of U1 to GND. Alternatively, the pins of U1 can be shorted to VDD or VSS by connecting between pin 4 of the header and pin 2 or pin 6 respectively. Figure 4-2 and Table 4-1 includes detailed descriptions of the connections on J1 through J16.
As shown in Figure 5-2 and Figure 5-3 as R21 and R22 on the J5 (pin 5 of U1) signal line, the TMUXBQB-DYYEVM includes 0 Ω series resistors (0805 package) on each signal line.
These can be substituted for different resistors as desired. Additionally, there are pads for pull-up and pull-down resistors to VDD and GND respectively. Add any 0603 resistor to the footprint shown as R17 to provide pull-up to VDD, and add any 0603 resistor to the footprint shown as R29 to provide pull-down to GND.
Each signal line also includes two footprints that allow for the user to attach capacitors or other devices with matching footprints. On the top side of the board, shown in Figure 5-2 and Figure 5-3 as C5, a standard 1206 footprint exists between the U1 pin signal and the GND signal. The user can solder a capacitor to this footprint to provide capacitance to the signal line.
On the back side of the board, shown in Figure 5-4 as C104, a standard 1812 footprint exists, also allowing for connection of a capacitor between the U1 pin signal and GND. The user can solder a capacitor to this footprint to provide capacitance to the signal line.
Figure 6-1 shows the layout of the EVM PCB.