SCEA109A July   2021  – August 2021 SN74AVC8T245 , SN74AVC8T245-Q1 , SN74AXC8T245 , SN74AXC8T245-Q1 , SN74LXC8T245

 

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  3.   Design Considerations
  4.   Recommended Parts

Design Considerations

  • Board layout is critical to the success of RGMII translation; we recommend using signal integrity simulations and prototyping for any design
  • Use active translators for maximum data rate
  • Use one device for all TX signals and one for all RX signals to minimize channel-to-channel skew
  • See Low Voltage Translation For SPI, UART, RGMII, JTAG Interfaces for details regarding the performance of SN74AXC8T245 in RGMII applications
  • Place translators closest to the low-voltage device, if possible, to improve signal integrity
  • Consider source-terminating signals if sent over 12 cm (4700 mil) or longer traces
  • Need additional assistance? Ask our engineers a question on the TI E2E™ logic support forum