SCEA134 july 2023 SN74LVC1G97-Q1
For the purpose of this application brief, Figure 1 shows logic and translation use cases. Each red block is associated to a use-case document. Table 1 and Table 2 list documentation links. For a complete block diagram, see the Mechanically Scanning LIDAR product page.
Each use case is linked to a separate short document that provides additional details including a block diagram, design tips, and part recommendations. The nearest block and use-case identifiers are listed to match up exactly to the use cases shown in Figure 1 .
Nearest Block | Use-Case Identifier | Use Case |
---|---|---|
Battery input protection | Power good combination | Combine Power Good Signals |
Digital processing | I/O expansion | Increase Inputs on a uC |
Timed restart | Reset a System for a Short Time | |
Diagnostics and monitoring | Combine error signals | Use Fewer Inputs to Monitor Error Signals |
Nearest Block | Use-Case Identifier | Use Case |
---|---|---|
Digital processing | UART translation | Translate Voltages for UART |
Light sensor | I2C translation | Translate Voltages for I2C |
Error source signals can be combined to reduce the number of required inputs to a system controller when it is more important to know that an error has occurred than it is to know which device triggered the error. For example, if an overheating condition is detected, it is likely that the system can increase fan speed or shut down operations to respond to the issue regardless of which device signaled the error.
See the Use Fewer Inputs to Monitor Error Signals video to learn more about this use case.
Part Number | Automotive Qualified | VCC Range | Type | Features |
---|---|---|---|---|
SN74HCS21-Q1 | ✓ | 2 V – 6 V | Dual 4-input AND gate | Schmitt trigger inputs Positive and negative clamp diodes on all inputs and outputs |
SN74LVC1G125-Q1 | ✓ | 1.65 V – 5.5 V | Single buffer with 3-state outputs | Standard CMOS inputs Inverting OE signal; see '1G126 for non-inverting OE signal |
SN74LVC1G11-Q1 | ✓ | 1.65 V – 5.5 V | Single 3-input AND gate | Standard CMOS inputs Supports partial-power-down with Ioff circuitry, disabling outputs. |
SN74LVC1G96-Q1 | ✓ | 1.65 V – 5.5 V | Configurable multi-function gate | Schmitt trigger inputs Between the '1G57 and '1G58, all 2-input logic gate functions can be produced. See data sheets for details. |
For more devices with Schmitt trigger input architecture, see the online parametric tool which can be sorted by the desired voltage, output current, and other features.