SCES502Q
November 2003 – March 2024
SN74AUP1G08
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics, CL = 5 pF
5.7
Switching Characteristics, CL = 10 pF
5.8
Switching Characteristics, CL = 15 pF
5.9
Switching Characteristics, CL = 30 pF
5.10
Operating Characteristics
5.11
Typical Characteristics
6
Parameter Measurement Information
6.1
Propagation Delays, Setup and Hold Times, and Pulse Duration
6.2
Enable and Disable Times
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Receiving Notification of Documentation Updates
11.2
Support Resources
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
Data Sheet
SN74AUP1G08 Low-Power Single 2-Input Positive-AND Gate