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  • TXV0108-Q1 Automotive 8-Bit Direction Controlled Low-Skew, Low-Jitter Voltage Translator or Buffer

    • SCES958B July   2023  – April 2024 TXV0108-Q1

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  • TXV0108-Q1 Automotive 8-Bit Direction Controlled Low-Skew, Low-Jitter Voltage Translator or Buffer
  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, VCCA = 1.2 ± 0.06 V
    7. 5.7  Switching Characteristics, VCCA = 1.8 ± 0.15 V
    8. 5.8  Switching Characteristics, VCCA = 2.5 ± 0.2 V
    9. 5.9  Switching Characteristics, VCCA = 3.3 ± 0.3 V
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Load Circuit and Voltage Waveforms
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 7.3.2 Partial Power Down (Ioff)
      3. 7.3.3 VCC Isolation and VCC Disconnect (Ioff-float)
      4. 7.3.4 Over-Voltage Tolerant Inputs
      5. 7.3.5 Negative Clamping Diodes
      6. 7.3.6 Fully Configurable Dual-Rail Design
      7. 7.3.7 Supports Timing Sensitive Translation
      8. 7.3.8 Wettable Flanks
      9. 7.3.9 Integrated Damping Resistor and Impedance Matching
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 Solving Power Sequencing Challenges with the TXV0108-Q1
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
  13. IMPORTANT NOTICE
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Data Sheet

TXV0108-Q1 Automotive 8-Bit Direction Controlled Low-Skew, Low-Jitter Voltage Translator or Buffer

1 Features

  • Configurable design allows each port to operate with a power supply range from 1.14V to 3.6V

  • Supports up to 500Mbps for 1.65V to 3.6V
  • AEC-Q100 qualified for automotive applications
  • Meets RGMII 2.0 timing specifications:
    • < 750ps rise and fall time
    • < ± 5 % duty cycle distortion
    • < ± 400ps channel to channel skew
    • Up to 250Mbps/channel
  • Integrated 10Ω damping output resistor to minimize signal reflections
  • High drive strength (up to 12mA at 3.6V)
  • Fully configurable symmetric dual-rail design
  • Optimal signal integrity performance with 390ps peak-to-peak jitter for 1.8V to 3.3V
  • Features VCC isolation and VCC disconnect
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 2000-V Human-Body Model
    • 1000-V Charged-Device Model
  • Low power consumption:
    • 10µA maximum (25°C)
    • 20µA maximum (–40°C to 125°C)
  • Operating temperature from –40°C to +125°C
  • Pin compatible with SN74AVC8T245 (VQFN)
  • Available in wettable flank VQFN (RGY) package

2 Applications

  • Medium or short range radar
  • ADAS domain controller
  • HVAC controller design
  • Machine vision camera
  • Rack server motherboard
  • IP telephone

3 Description

The TXV0108-Q1 is an 8-bit, dual-supply direction controlled low-skew, low-jitter voltage translation device. This device can be used for redriving, voltage translation, and power isolation when implementing skew sensitive interface, such as RGMII between Ethernet® MAC and PHY devices. The Ax I/O pins and control pins (DIR, OE) are referenced to VCCA logic levels, and Bx I/O pins are referenced to VCCB logic levels. This device has improved channel-to-channel skew, duty cycle distortion and symmetric rise and fall time for applications requiring strict timing conditions.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature is designed so that if either VCC supply is at or near 0V both ports will switch to a high-impedance state. This feature enables power isolation for communications across multiple MACs and PHYs, and is beneficial in situations where MACs and PHYs are powered up asynchronously preventing current backflow between devices.

A High on DIR allows data transmission from A to B while a Low on DIR allows data transmission from B to A when OE is set to Low. When OE is set to High, both Ax and Bx pins will be forced into a high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

Package Information
PART NUMBER PACKAGE(1)PACKAGE SIZE(2)
TXV0108-Q1RGY (VQFN, 24)5.5mm × 3.5mm
(1) For more information, see Section 11.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
GUID-20231201-SS0I-SXSG-1H1D-6LK5JV6H5DCT-low.svg TXV0108-Q1 in RGMII Applications

 
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