SCEU030 August   2024 TPLD1201

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Functional Blocks
      1. 2.1.1 Test Points
      2. 2.1.2 Programmer Header Block (P1)
      3. 2.1.3 External Connection Header Block
      4. 2.1.4 GPI Protection Block
      5. 2.1.5 DGS Socket
    2. 2.2 GPIO Testing Blocks
      1. 2.2.1 LED Blocks
      2. 2.2.2 Switch Blocks
      3. 2.2.3 LED/Potentiometer Blocks
  9. 3Software
    1. 3.1 Using the TPLD1201-DGS-EVM
      1. 3.1.1 Equipment Needed for Programming
      2. 3.1.2 Installing Software
    2. 3.2 Configuring a TPLD Device
      1. 3.2.1 TPLD1201-DGS-EVM Setup for Programming
      2. 3.2.2 Inserting a TPLD1201DGS into the DGS Socket
      3. 3.2.3 Connecting the TPLD1201-DGS-EVM to a TPLD-PROGRAM Board
      4. 3.2.4 Temporarily Configuring a TPLD Device
      5. 3.2.5 Permanently Programming a TPLD Device
    3. 3.3 Testing with the TPLD1201-DGS-EVM Demo
      1. 3.3.1 TPLD1201 Demo Circuit
      2. 3.3.2 Testing the Demo
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layout
      1. 4.2.1 PCB Overview
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks

1.4 Device Information

The TPLD1201 is part of the TI programmable logic device (TPLD) family of devices that features configurable I/O structures that extends compatibility within mixed-signal environments, reducing the number of discrete components required. System designers can create circuits and configure the macro-cells, I/O pins, and interconnections by temporarily emulating the non-volatile memory or by permanently programming the one-time programmable (OTP) through InterConnect Studio.