SCHS292A December   1998  – May 2024 CD54AC574 , CD54ACT574 , CD74AC574 , CD74ACT574

PRODUCTION DATA  

  1.   1
  2. Features
  3. Description
  4. Pin Configuration and Functions
  5. Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Recommended Operating Conditions
    4. 4.4  Thermal Information
    5. 4.5  Static Electrical Characteristics: AC Series
    6. 4.6  Static Electrical Characteristics: ACT Series
    7. 4.7  Prerequisite for Switching: AC Series
    8. 4.8  Switching Characteristics: AC Series
    9. 4.9  Prerequisite for Switching: ACT Series
    10. 4.10 Switching Characteristics: ACT Series
  6. Parameter Measurement Information
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
  9. Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Pin Configuration and Functions

CD54AC574 CD74AC574 CD54ACT574 CD74ACT574 CDx4AC/ACT574 DW Package, 20-Pin SOIC; N Package, 20-Pin PDIP
                        (Top View)Figure 3-1 CDx4AC/ACT574 DW Package, 20-Pin SOIC; N Package, 20-Pin PDIP (Top View)
Table 3-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
OE 1 I Active low enable
1Q 2 O Data output
1D 3 I Data input
2D 4 I Data input
2Q 5 O Data output
3Q 6 O Data output
3D 7 I Data input
4D 8 I Data input
4Q 9 O Data output
GND 10 - Ground pin
CLK 11 I Clock pin
5Q 12 O Data output
5D 13 I Data input
6D 14 I Data input
6Q 15 O Data output
7Q 16 O Data output
7D 17 I Data input
8D 18 I Data input
8Q 19 O Data output
VCC 20 - Power pin