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  • CDx4ACT32 Quadruple 2-Input Positive-or Gates

    • SCHS342A March   2003  – August 2024 CD54ACT32 , CD74ACT32

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  • CDx4ACT32 Quadruple 2-Input Positive-or Gates
  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics
    7. 4.7 Operating Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Functional Block Diagram
    2. 6.2 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
  12. IMPORTANT NOTICE
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CDx4ACT32 Quadruple 2-Input Positive-or Gates

1 Features

  • Inputs are TTL-voltage compatible
  • Buffered inputs
  • Speed of bipolar F, AS, and S, with significantly reduced power consumption
  • Balanced propagation delays
  • •±24mA output drive current
    • Fanout to 15 F devices
  • SCR-latchup-resistant CMOS process and circuit design
  • Exceeds 2k V ESD protection per MIL-STD-883, method 3015

 
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