SCHS344B April   2003  – October 2024 CD54ACT174 , CD74ACT174

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Operating Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Power Supply Recommendations
    2. 8.2 Layout
      1. 8.2.1 Layout Guidelines
      2. 8.2.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support (Analog)
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

CD54ACT174 CD74ACT174 CD54ACT174 J Package, 16-PIN CDIP; CD74ACT174 D, N, or PW Package; 16-PIN SOIC, PDIP, or TSSOP (Top View)Figure 4-1 CD54ACT174 J Package, 16-PIN CDIP; CD74ACT174 D, N, or PW Package; 16-PIN SOIC, PDIP, or TSSOP (Top View)
CD54ACT174 CD74ACT174 BQB Package, 16-Pin WQFN (Top View)Figure 4-2 BQB Package, 16-Pin WQFN (Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
CLR 1 I Clear Pin
1Q 2 O 1Q Output
1D 3 I 1D Input
2D 4 I 2D Input
2Q 5 O 2Q Output
3D 6 I 3D Input
3Q 7 O 3Q Output
GND 8 — Ground Pin
CLK 9 I Clock Pin
4Q 10 O 4Q Output
4D 11 I 4D Input
5Q 12 O 5Q Output
5D 13 I 5D Input
6D 14 I 6D Input
6Q 15 O 6Q Output
VCC 16 P Power Pin