SCLA018A March   2019  – April 2021 SN74AVC4T774 , TXB0104

 

  1.   Trademarks
  2. 1Block Diagram
  3. 2Optimize System Controller to Wireless Module Interface
  4. 3Logic and Translation Use Cases
    1. 3.1 Logic Use Cases
      1. 3.1.1 Increase Number of Controller Outputs
      2. 3.1.2 Drive Indicator LEDs
      3. 3.1.3 Open-Drain Buffer
      4. 3.1.4 Debounce Switches and Buttons
      5. 3.1.5 Generate a Clock Signal from a Crystal Oscillator
    2. 3.2 Voltage Translation Use Cases
      1. 3.2.1 SPI Communication
      2. 3.2.2 GPIO Communication
      3. 3.2.3 I2C Communication
      4. 3.2.4 SD Card Communication
  5. 4Recommended Logic and Translation Families for Video Doorbells
    1. 4.1 AUP: Advanced Ultra-Low-Power CMOS Logic and Translation
    2. 4.2 AXC: Advanced Extremely Low-Voltage CMOS Translation
    3. 4.3 LVC: Low-Voltage CMOS Logic and Translation
  6. 5Revision History

4.1 AUP: Advanced Ultra-Low-Power CMOS Logic and Translation

Key Features: SN74AUPxGxxxx

  • Low static-power and dynamic-power consumption.
  • Wide VCC operating range: 0.8 V to 3.6 V.
  • Input hysteresis allows for slow input transition rate.
  • Best in class for speed-power optimization.
  • Ioff spec for partial-power-down support.
  • Packaging Options: DSBGA, SC70, SM8, SON, SOT-23, SOT, UQFN, US8, and X2SON.

Key Features: SN74AUPxTxxxx

  • Low static-power and dynamic-power consumption.
  • 1.65 V to 3.6 V translation range.
  • Best in class for speed-power optimization.
  • Ioff specification for partial-power-down support.

Visit TI's Online parametric search tool to find the correct AUP family logic and voltage level translation devices.