SCLA025B December   2019  – March 2021 SN74LVC1G08

 

  1. 1Trademarks
  2. 2Block Diagram
  3. 3Optimizing Communication with Wireless Interfaces
    1. 3.1 SDIO Voltage Translation
    2. 3.2 UART Voltage Translation
  4. 4Logic and Translation Use Cases
    1. 4.1 Logic Use Cases
      1. 4.1.1 Drive Indicator LEDs
      2. 4.1.2 Power Sequencing: Combine Power Good Signals
      3. 4.1.3 Debounce Switches and Buttons
      4. 4.1.4 Tamper Detection: Latching Alarm Circuit with Reset
    2. 4.2 Voltage Translation Use Cases
      1. 4.2.1 SPI Communication
      2. 4.2.2 SD Card Communication
  5. 5Recommended Logic and Translation Families for HVAC Gateways
    1. 5.1 AUP: Advanced Ultra-Low-Power CMOS Logic and Translation
    2. 5.2 AXC: Advanced eXtremely Low-Voltage CMOS Translation
    3. 5.3 LVC: Low-Voltage CMOS Logic and Translation
  6. 6Revision History

5.2 AXC: Advanced eXtremely Low-Voltage CMOS Translation

Key Features

  • Up and down translation across 0.65 V to 3.6 V
  • Designed with glitch suppression circuitry to improve power sequencing performance
  • Maximum quiescent current (ICCA + ICCB) as low as 6 µA (85°C maximum) and 14 µA (125°C maximum)
  • Up to 500-Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature – If either VCC input is below 100 mV, all I/Os outputs are disabled and become high impedance
  • Ioff supports partial-power-down mode operation
  • Operating temperature: –40°C to 125°C
  • Packaging Options:
    • SC70
    • SM8
    • SON
    • SOT, SOT-23
    • UQFN
    • US8
    • X2SON

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