SCLS521F
August 2003 – October 2024
SN74LV4053A-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Thermal Information: SN74LV4053A-Q1
5.4
Recommended Operating Conditions
5.5
Electrical Characteristics
5.6
Timing Characteristics VCC = 2.5 V ± 0.2 V
5.7
Timing Characteristics VCC = 3.3 V ± 0.3 V
5.8
Timing Characteristics VCC = 5 V ± 0.5 V
5.9
AC Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Functional Block Diagram
7.2
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.3
Design Requirements
8.4
Detailed Design Procedure
8.5
Power Supply Recommendations
8.6
Layout
8.6.1
Layout Guidelines
8.6.2
Layout Example
9
Device and Documentation Support
9.1
Receiving Notification of Documentation Updates
9.2
Support Resources
9.3
Trademarks
9.4
Electrostatic Discharge Caution
9.5
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
6
Parameter Measurement Information
Figure 6-1
On-State Resistance Test Circuit
Figure 6-2
Off-State Switch Leakage-Current Test Circuit
Figure 6-3
On-State Switch Leakage-Current Test Circuit
Figure 6-4
Propagation Delay Time, Signal Input to Signal Output
Figure 6-5
Switching Time (t
PZL
, t
PLZ
, t
PZH
, t
PHZ
), Control to Signal Output
Figure 6-6
Frequency Response (Switch On)
Figure 6-7
Crosstalk Between Any Two Switches
Figure 6-8
Crosstalk Between Control Input and Switch Output
Figure 6-9
Feedthrough Attenuation (Switch Off)
Figure 6-10
Sine-Wave Distortion