SCLS739E September   2013  – March 2024 SN74LV1T08

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Related Products
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS Push-Pull Outputs
      2. 8.3.2 LVxT Enhanced Input Voltage
        1. 8.3.2.1 Up Translation
        2. 8.3.2.2 Down Translation
      3. 8.3.3 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Power Supply Recommendations
    2. 9.2 Layout
      1. 9.2.1 Layout Guidelines
      2. 9.2.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support (Analog)
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Description

The SN74LV1T08 is a single 2-input AND gate with reduced input thresholds to support voltage translation applications.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3)
SN74LV1T08 DBV (SOT-23, 5) 2.90mm × 2.8mm 2.9mm x 1.6mm
DCK (SC70, 5) 2.00mm × 2.1mm 2mm × 1.25mm
For more information, see Section 12.
The package size (length × width) is a nominal value and includes pins, where applicable.
The body size (length x width) is a nominal value and does not include pins.
SN74LV1T08 Switching Thresholds for 1.8V to 3.3V Translation Switching Thresholds for 1.8V to 3.3V Translation