SCLS973B October   2023  – May 2024 SN74LVC3G97-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Noise Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 CMOS Schmitt-Trigger Inputs
      2. 7.3.2 Balanced CMOS Push-Pull Outputs
      3. 7.3.3 Clamp Diode Structure
      4. 7.3.4 Wettable Flanks
    4. 7.4 Device Functional Modes
      1. 7.4.1 Logic Configurations
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

SN74LVC3G97-Q1 SN74LVC3G97-Q1 PW Package (Preview), 14-Pin TSSOP (Top View)Figure 4-1 SN74LVC3G97-Q1 PW Package (Preview), 14-Pin TSSOP (Top View)
SN74LVC3G97-Q1 SN74LVC3G97-Q1 BQA Package, 14-Pin WQFN (Top View)Figure 4-2 SN74LVC3G97-Q1 BQA Package, 14-Pin WQFN (Top View)
Table 4-1 Pin Functions
PINTYPE(1)DESCRIPTION
NAMENO.
A11

I

Channel 1, Input A
B12

I

Channel 1, Input B
A23

I

Channel 2, Input A
B24

I

Channel 2, Input B
A35

I

Channel 3, Input A
B36

I

Channel 3, Input B
GND7

G

Ground
Y38

O

Channel 3, output Y
C39

I

Channel 3, Input C
Y210

O

Channel 2, Output Y
C211

I

Channel 2, Input C
Y112

O

Channel 1, Output Y
C113

I

Channel 1, Input C
VCC14

P

Positive supply
Thermal Pad(2) — The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply
(1) I = input, O = output, I/O = input or output, G = ground, P = power.
(2) BQA package only.