2 SDA Signal During Acknowledge

During an I²C transaction, after the controller sends out the I²C address to the target device, the target should respond with an Acknowledge (ACK) to let the controller know the target recognizes its address and to signal to the controller to continue the transaction. This document focuses specifically on the ACK response from the target. Figure 2-1 shows the beginning of I²C communication between an I²C controller and I²C target in which the controller sends the address and the target responds with an ACK.

On the falling edge of the eighth clock cycle, the target takes control of the bus to signal to the controller that it has Acknowledged its address was called. Figure 2-2 shows the target driving the SDA line low after a short delay on the falling edge of the eighth clock pulse.

The yellow box shows illustrates the controller driving the SCL and SDA line low during a write transaction. The red box shows that there is a short period of time where both the controller and target have control of the bus after the eighth clock pulse, essentially an overlap of SDA being driven low by both controller and target. The purple box shows that the target has total control of the bus well before the start of the ninth clock pulse and through the duration of the ninth clock pulse. In this example, the open drain drivers of both the controller and the target overlapped and drove the SDA line low during the red box. This kind of example is common and occurs when the controller releases the SDA line after the target device drives the SDA line low.