SCPA063 March   2023 PCA9306

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2General Checks for Dealing With NACKs
    1. 2.1 NACKs
    2. 2.2 Check the Schematic
    3. 2.3 Double Check SDA and SCL Between the Controller and Target
    4. 2.4 RESET Properly Biased
    5. 2.5 Device is Soldered Properly
  5. 3Scopeshots
    1. 3.1 Why use Oscilloscopes for Debugging?
    2. 3.2 Setting up the Oscilloscope
    3. 3.3 Verify the I2C Address When a NACK is Received
    4. 3.4 Validate Start and Stop Conditions
    5. 3.5 Check the Byte Format
    6. 3.6 Are Rise Times Within I2C Standard?
    7. 3.7 Are the Sent Command Bytes Valid?
  6. 4I2C Switches
    1. 4.1 Stop Conditions for TI I2C Switches
  7. 5I2C Buffers
    1. 5.1 VoL versus ViLc of the Buffer
    2. 5.2 VoL of the Buffer Exceeds the ViL of the I2C Target
    3. 5.3 Static Offset of Buffers Cannot Connect to Other Static Offsets
  8. 6Checklists
  9. 7Conclusion

1 Introduction

Inter-IC (I2C) is a popular serial communication protocol that allows for multiple controller devices to communicate with multiple target devices. I2C consists of a bidirectional two-wire bus, where one line serves as a serial data line (SDA) and the other serves as a serial clock line (SCL). Both lines of the two-wire bus are generally connected to an open drain or open collector driver with an input buffer that supports bidirectional data transfer. When working with an open drain or open collector system, being aware of all the potential issues that can cause communication failures is important. The purpose of this article is to provide a comprehensive guide for recognizing and debugging these issues quickly and effectively.