SCPA063 March   2023 PCA9306

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2General Checks for Dealing With NACKs
    1. 2.1 NACKs
    2. 2.2 Check the Schematic
    3. 2.3 Double Check SDA and SCL Between the Controller and Target
    4. 2.4 RESET Properly Biased
    5. 2.5 Device is Soldered Properly
  5. 3Scopeshots
    1. 3.1 Why use Oscilloscopes for Debugging?
    2. 3.2 Setting up the Oscilloscope
    3. 3.3 Verify the I2C Address When a NACK is Received
    4. 3.4 Validate Start and Stop Conditions
    5. 3.5 Check the Byte Format
    6. 3.6 Are Rise Times Within I2C Standard?
    7. 3.7 Are the Sent Command Bytes Valid?
  6. 4I2C Switches
    1. 4.1 Stop Conditions for TI I2C Switches
  7. 5I2C Buffers
    1. 5.1 VoL versus ViLc of the Buffer
    2. 5.2 VoL of the Buffer Exceeds the ViL of the I2C Target
    3. 5.3 Static Offset of Buffers Cannot Connect to Other Static Offsets
  8. 6Checklists
  9. 7Conclusion

4.1 Stop Conditions for TI I2C Switches

Texas Instruments I2C switch devices require a stop condition to properly read in information from I2C writes. Stop conditions must be sent at the end of an I2C data transfer frame for the information to be executed by the receiving device (a repeated start condition does not work). In the case where the user does a write to an I2C switch and implements a restart condition followed by an I2C read transaction, the I2C switch data read shows the same data written from the last write transaction; however, the device does not actually enable the channels that were intended. In short, if a repeated start is used to read data from a TI I2C switch, the data read looks correct but is not actually implemented. See this E2E™ forum thread for more details about this special feature.