SCPA063 March   2023 PCA9306

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2General Checks for Dealing With NACKs
    1. 2.1 NACKs
    2. 2.2 Check the Schematic
    3. 2.3 Double Check SDA and SCL Between the Controller and Target
    4. 2.4 RESET Properly Biased
    5. 2.5 Device is Soldered Properly
  5. 3Scopeshots
    1. 3.1 Why use Oscilloscopes for Debugging?
    2. 3.2 Setting up the Oscilloscope
    3. 3.3 Verify the I2C Address When a NACK is Received
    4. 3.4 Validate Start and Stop Conditions
    5. 3.5 Check the Byte Format
    6. 3.6 Are Rise Times Within I2C Standard?
    7. 3.7 Are the Sent Command Bytes Valid?
  6. 4I2C Switches
    1. 4.1 Stop Conditions for TI I2C Switches
  7. 5I2C Buffers
    1. 5.1 VoL versus ViLc of the Buffer
    2. 5.2 VoL of the Buffer Exceeds the ViL of the I2C Target
    3. 5.3 Static Offset of Buffers Cannot Connect to Other Static Offsets
  8. 6Checklists
  9. 7Conclusion

Validate Start and Stop Conditions

Before any address or data bits are sent over an I2C bus, a start condition must be sent. A high-to-low transition on the SDA line while SCL is high defines a start condition (SCL must go low after this transition occurs for the frame to officially begin). Use an oscilloscope to verify that a start condition is properly initiated before any data or address bits are sent on the I2C bus. Figure 3-2 shows what a start condition looks like and the minimum hold time required according to the frequency of operation.

GUID-20221012-SS0I-WZR7-NW6W-BDHV18W91X13-low.svg Figure 3-2 Example of Start Condition

After the address and data bits are sent, a stop condition is initiated so the controller can let the bus go idle (assuming there is not another controller on the bus, in which case a restart condition can be valid). A low-to-high transition on the SDA line while SCL is already high defines a stop condition. Use an oscilloscope to verify that a stop condition is properly initiated once the controller is ready to let the I2C bus go idle. Figure 3-3 shows a stop condition and the minimum setup time required according to the frequency of operation.

GUID-20221012-SS0I-4R21-VDF0-K7MCFHRVVDC4-low.svg Figure 3-3 Example of Stop Condition