SCPA063 March   2023 PCA9306

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2General Checks for Dealing With NACKs
    1. 2.1 NACKs
    2. 2.2 Check the Schematic
    3. 2.3 Double Check SDA and SCL Between the Controller and Target
    4. 2.4 RESET Properly Biased
    5. 2.5 Device is Soldered Properly
  5. 3Scopeshots
    1. 3.1 Why use Oscilloscopes for Debugging?
    2. 3.2 Setting up the Oscilloscope
    3. 3.3 Verify the I2C Address When a NACK is Received
    4. 3.4 Validate Start and Stop Conditions
    5. 3.5 Check the Byte Format
    6. 3.6 Are Rise Times Within I2C Standard?
    7. 3.7 Are the Sent Command Bytes Valid?
  6. 4I2C Switches
    1. 4.1 Stop Conditions for TI I2C Switches
  7. 5I2C Buffers
    1. 5.1 VoL versus ViLc of the Buffer
    2. 5.2 VoL of the Buffer Exceeds the ViL of the I2C Target
    3. 5.3 Static Offset of Buffers Cannot Connect to Other Static Offsets
  8. 6Checklists
  9. 7Conclusion

Check the Schematic

When debugging an I2C device, always check and see if the data sheet pinout matches the schematic pinout. Sometimes the pins on a schematic are arranged differently from how the pins are presented on a device data sheet. If this check was not performed, there is a chance that the device can be incorrectly connected on the circuit. Leaving a device incorrectly connected can cause the device to become damaged whenever the circuit is energized. Therefore, to avoid damaging the device unintentionally, always check to see if there are any differences between the pinout of the data sheet and the pinout of the schematic.

Figure 2-2 shows an example of TCA9555 in which a schematic error can cause a NACK to occur.

GUID-20221012-SS0I-HBLR-KSZG-M67Z5M43VZ91-low.svgFigure 2-2 TCA9555 With Error in Schematic

The error illustrated in Figure 2-2 involves pin 2 and pin 3 being swapped (A2 and A1) which indicates the I2C target address is 0x25h. Figure 2-3 reveals the schematic error side by side with the TCA9555 data sheet pinout. With the A1 and A2 swap, the schematic address indicates 0x25h while the correct I2C target address based on the data sheet pinout is 0x23h. Anyone viewing the schematic incorrectly tries to communicate with the I2C target at 0x25h and always receive a NACK.

GUID-20221012-SS0I-NHGB-3WFD-2WPMXCTC7FDL-low.svgFigure 2-3 TCA9555 With Error in Schematic Revealed