SCPS133K December   2005  – December 2024 PCA9557

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Interface Timing Requirements
    7. 5.7 Reset Timing Requirements
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Feature Description
      1. 7.2.1 RESET
        1. 7.2.1.1 RESET Errata
          1. 7.2.1.1.1 System Impact
          2. 7.2.1.1.2 System Workaround
      2. 7.2.2 Power-On Reset
    3. 7.3 Programming
      1. 7.3.1 I2C Interface
    4. 7.4 Register Maps
      1. 7.4.1 Device Address
      2. 7.4.2 Control Register And Command Byte
      3. 7.4.3 Register Descriptions
        1. 7.4.3.1 Bus Transactions
          1. 7.4.3.1.1 Writes
          2. 7.4.3.1.2 Reads
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Minimizing ICC when I/O is Used to Control LED
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-On Reset Errata
        1. 8.3.1.1 System Impact
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

3 Description

This 8-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3V to 5.5V VCC operation. The device provides general-purpose remote I/O expansion for most microcontroller families through the I2C interface [serial clock (SCL) and serial data (SDA)].

The PCA9557 consists of one 8-bit configuration (input or output selection), input port, output port, and polarity inversion (active-high) registers. At power on, the I/Os are configured as inputs. However, the system controller can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding input or output register. The polarity of the input port register can be inverted with the polarity inversion register. All registers can be read by the system controller.

The device outputs (latched) have high-current drive capability for directly driving LEDs. The device has low current consumption.

The system controller can reset the PCA9557 in the event of a timeout or other improper operation by asserting a low in the active-low reset (RESET) input. The power-on reset puts the registers in their default state and initializes the I2C/SMBus state machine. Asserting RESET causes the same reset/initialization to occur without depowering the part.

Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I2C address, allowing up to eight devices to share the same I2C bus or SMBus.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
PCA9557D (SOIC, 16)9.9mm × 6mm
DB (SSOP, 16)6.2mm × 7.8mm
DGV (TVSOP, 16)3.6mm × 6.4mm
PW (TSSOP, 16)5mm × 6.4mm
RGY (VQFN, 16)4mm × 3.5mm
RGV (VQFN, 16)4mm × 4mm
(1) For more information, see Section 11.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
PCA9557 Logic DiagramLogic Diagram