SCPS133K December   2005  – December 2024 PCA9557

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Interface Timing Requirements
    7. 5.7 Reset Timing Requirements
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Feature Description
      1. 7.2.1 RESET
        1. 7.2.1.1 RESET Errata
          1. 7.2.1.1.1 System Impact
          2. 7.2.1.1.2 System Workaround
      2. 7.2.2 Power-On Reset
    3. 7.3 Programming
      1. 7.3.1 I2C Interface
    4. 7.4 Register Maps
      1. 7.4.1 Device Address
      2. 7.4.2 Control Register And Command Byte
      3. 7.4.3 Register Descriptions
        1. 7.4.3.1 Bus Transactions
          1. 7.4.3.1.1 Writes
          2. 7.4.3.1.2 Reads
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Minimizing ICC when I/O is Used to Control LED
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-On Reset Errata
        1. 8.3.1.1 System Impact
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Features

  • Low standby current consumption of 1μA maximum
  • I2C to parallel port expander
  • Operating power-supply voltage range of 2.3V to 5.5V
  • 5V Tolerant I/O ports
  • 400kHz Fast I2C bus
  • Three hardware address pins allow for use of up to eight devices on I2C/SMBus
  • Lower-voltage higher-performance migration path for PCA9556
  • Input and output configuration register
  • Polarity inversion register
  • Active-low reset input
  • Internal power-on reset
  • High-impedance open drain on P0
  • Power up with all channels configured as inputs
  • No glitch on power up
  • Noise filter on SCL or SDA inputs
  • Latched outputs with high current drive maximum capability for directly driving LEDs
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000V Human-body model (A114-A)
    • 200V Machine model (A115-A)
    • 1000V Charged-device model (C101)