SCPS202C October   2009  – May 2016 TCA9539

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 RESET Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 RESET Input
      3. 8.3.3 Interrupt (INT) Output
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
      3. 8.6.3 Register Descriptions
        1. 8.6.3.1 Bus Transactions
          1. 8.6.3.1.1 Writes
          2. 8.6.3.1.2 Reads
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Calculating Junction Temperature and Power Dissipation
        2. 9.2.1.2 Minimizing ICC When I/Os Control LEDs
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

10 Power Supply Recommendations

10.1 Power-On Reset Requirements

In the event of a glitch or data corruption, the TCA9539 can be reset to its default conditions by using the power-on reset feature. Power-on reset requires that the device go through a power cycle to be completely reset. This reset also happens when the device is powered on for the first time in an application.

The voltage waveform for a power-on reset is shown in Figure 40.

TCA9539 pwron02_cps204.gif
VCC Is lowered below the POR threshold, then ramped back up to VCC
Figure 40. Voltage Waveform for Power-On Reset

Table 8 specifies the performance of the power-on reset feature for the TCA9539.

Table 8. Recommended Supply Sequencing and Ramp Rates (1)

PARAMETER MIN TYP MAX UNIT
VCC_FT Fall rate See Figure 40 0.1 ms
VCC_RT Rise rate See Figure 40 0.1 ms
VCC_TRR Time to re-ramp (when VCC drops to VPOR_MIN – 50 mV or when VCC drops to GND) See Figure 40 1 μs
VCC_GH The level (referenced to VCC) that VCC can glitch down to, but not cause a functional disruption when VCC_GW See Figure 41 1.2 V
VCC_MV The minimum voltage that VCC can glitch down to without causing a reset (VCC_GH must not be violated) See Figure 41 1.5 V
VCC_GW Glitch width that will not cause a functional disruption See Figure 41 10 μs
VPORF Voltage trip point of POR on falling VCC 0.75 1 V
VPORR Voltage trip point of POR on rising VCC 1.2 1.5 V
(1) TA = –40°C to +85°C (unless otherwise noted)

Glitches in the power supply can also affect the power-on reset performance of this device. The glitch width (VCC_GW) and height (VCC_GH) are dependent on each other. The bypass capacitance, source impedance, and device impedance are factors that affect power-on reset performance. Figure 41 and Table 8 provide more information on how to measure these specifications.

TCA9539 pwron03_scps254.gif Figure 41. Glitch Width and Glitch Height

VPOR is critical to the power-on reset. VPORR is the voltage level at which the reset condition is released and all the registers and the I2C-SMBus state machine are initialized to their default states. The value of VPOR differs based on the VCC being lowered to or from 0. Figure 42 and Table 8 provide more details on this specification.

TCA9539 POR_waveform.gif Figure 42. VPOR