SCPS222C May   2010  – October 2015 TCA8418E

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  I2C Interface Timing Requirements
    7. 6.7  Reset Timing Requirements for Standard Mode, Fast Mode, Fast Mode Plus (FM+) I2C Bus
    8. 6.8  Switching Characteristics for Standard Mode, Fast Mode, Fast Mode Plus (FM+) I2C Bus
    9. 6.9  Keypad Switching Characteristics for Standard Mode, Fast Mode, Fast Mode Plus (FM+) I2C Bus
    10. 6.10 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Key Events
        1. 8.3.1.1 Key Event Table
        2. 8.3.1.2 General Purpose Input (GPI) Events
        3. 8.3.1.3 Key Event (FIFO) Reading
        4. 8.3.1.4 Key Event Overflow
      2. 8.3.2 Keypad Lock/Unlock
      3. 8.3.3 Keypad Lock Interrupt Mask Timer
      4. 8.3.4 Control-Alt-Delete Support
      5. 8.3.5 Interrupt Output
        1. 8.3.5.1 50-µs Interrupt Configuration
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset (POR)
      2. 8.4.2 Powered (Key Scan Mode)
        1. 8.4.2.1 Idle Key Scan Mode
        2. 8.4.2.2 Active Key Scan Mode
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
      2. 8.5.2 Bus Transactions
        1. 8.5.2.1 Writes
        2. 8.5.2.2 Reads
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
        1. 8.6.2.1  Configuration Register (Address 0x01)
        2. 8.6.2.2  Interrupt Status Register, INT_STAT (Address 0x02)
        3. 8.6.2.3  Key Lock and Event Counter Register, KEY_LCK_EC (Address 0x03)
        4. 8.6.2.4  Key Event Registers (FIFO), KEY_EVENT_A-J (Address 0x04-0x0D)
        5. 8.6.2.5  Keypad Lock1 to Lock2 Timer Register, KP_LCK_TIMER (Address 0x0E)
        6. 8.6.2.6  Unlock1 and Unlock2 Registers, UNLOCK1/2 (Address 0x0F-0x10)
        7. 8.6.2.7  GPIO Interrupt Status Registers, GPIO_INT_STAT1-3 (Address 0x11-0x13)
        8. 8.6.2.8  GPIO Data Status Registers, GPIO_DAT_STAT1-3 (Address 0x14-0x16)
        9. 8.6.2.9  GPIO Data Out Registers, GPIO_DAT_OUT1-3 (Address 0x17-0x19)
        10. 8.6.2.10 GPIO Interrupt Enable Registers, GPIO_INT_EN1-3 (Address 0x1A-0x1C)
        11. 8.6.2.11 Keypad or GPIO Selection Registers, KP_GPIO1-3 (Address 0x1D-0x1F)
        12. 8.6.2.12 GPI Event Mode Registers, GPI_EM1-3 (Address 0x20-0x22)
        13. 8.6.2.13 GPIO Data Direction Registers, GPIO_DIR1-3 (Address 0x23-0x25)
        14. 8.6.2.14 GPIO Edge/Level Detect Registers, GPIO_INT_LVL1-3 (Address 0x26-0x28)
        15. 8.6.2.15 Debounce Disable Registers, DEBOUNCE_DIS1-3 (Address 0x29-0x2B)
        16. 8.6.2.16 GPIO Pullup Disable Register, GPIO_PULL1-3 (Address 0x2C-0x2E)
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Ghosting Considerations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Designing the Hardware Layout
        2. 9.2.2.2 Configuring the Registers
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

7 Parameter Measurement Information

TCA8418E pmi_i2c_cps200.gif
A. CL includes probe and jig capacitance. tocf is measured with CL of 10 pF or 400 pF.
B. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf ≤ 30 ns.
C. All parameters and waveforms are not applicable to all devices.
Figure 16. I2C Interface Load Circuit and Voltage Waveforms
TCA8418E pmi_int_scps222.gif
A. CL includes probe and jig capacitance.
B. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf ≤ 30 ns.
C. All parameters and waveforms are not applicable to all devices.
Figure 17. Interrupt Load Circuit and Voltage Waveforms
TCA8418E pmi_p_port_scps222.gif
A. CL includes probe and jig capacitance.
B. tpv is measured from 0.7 × VCC on SCL to 50% I/O (Pn) output.
C. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf ≤ 30 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 18. P Port Load Circuit and Timing Waveforms
TCA8418E pmi_reset_scps222.gif
A. CL includes probe and jig capacitance.
B. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf ≤ 30 ns.
C. The outputs are measured one at a time, with one transition per measurement.
D. I/Os are configured as inputs.
E. All parameters and waveforms are not applicable to all devices.
Figure 19. Reset Load Circuits and Voltage Waveforms