SCPS245D December   2012  – September 2024 TCA9517A

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Timing Requirements
    8. 5.8 I2C Interface Switching Characteristics
    9. 5.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Two-Channel Bidirectional Buffer
      2. 7.3.2 Active-High Repeater-Enable Input
      3. 7.3.3 VOL B-Side Offset Voltage
      4. 7.3.4 Standard Mode and Fast Mode Support
      5. 7.3.5 Clock Stretching Support
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Clock Stretching Support
        2. 8.2.2.2 VILC and Pullup Resistor Sizing
      3. 8.2.3 Application Curve
  10. Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information
    2. 13.2 Mechanical Data

Electrical Characteristics

VCCB = 2.7 V to 5.5 V, GND = 0 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETERTEST CONDITIONSVCCBMINTYPMAXUNIT
VIKInput clamp voltageII = –18 mA2.7 V to 5.5 V–1.2V
VOLLow-level output voltageSDAB, SCLBIOL = 100 μA or 6 mA,
VILA = VILB = 0 V
2.7 V to 5.5 V0.450.520.6V
SDAA, SCLAIOL = 6 mA0.10.2
VOL – VILcLow-level input voltage below low-level output voltageSDAB, SCLBensured by design2.7 V to 5.5 V70mV
VILCSDA and SCL low-level input voltage contentionSDAB, SCLB2.7 V to 5.5 V0.45 0.4V
ICCQuiescent supply current for VCCABoth channels low,
SDAA = SCLA = GND and
SDAB = SCLB = open, or
SDAA = SCLA = open and
SDAB = SCLB = GND
1mA
ICCQuiescent supply currentBoth channels high,
SDAA = SCLA = VCCA and
SDAB = SCLB = VCCB and
EN = VCCB
5.5 V1.55mA
Both channels low,
SDAA = SCLA = GND and
SDAB = SCLB = open
1.55
In contention,
SDAA = SCLA = GND and
SDAB = SCLB = GND
35
IIInput leakage currentSDAB, SCLBVI = VCCB2.7 V to 5.5 V±1μA
VI = 0.2 V10
SDAA, SCLAVI = VCCB±1
VI = 0.2 V10
ENVI = VCCB±1
VI = 0.2 V–10–30
IOHHigh-level output leakage currentSDAB, SCLBVO = 3.6 V2.7 V to 5.5 V10μA
SDAA, SCLA10
CIInput capacitanceENVI = 3 V or 0 V3.3 V610pF
SCLA, SCLBVI = 3 V or 0 V3.3 V813
0 V711
CIOInput/output capacitanceSDAA, SDABVI = 3 V or 0 V3.3 V813pF
0 V711