SCPS275A July 2021 – December 2021 TCA9536
PRODUCTION DATA
In the event of a glitch or data corruption, the TCA9536 can be reset to its default conditions by using the power-on reset feature. Power-on reset requires that the device go through a power cycle to be completely reset. This reset also happens when the device is powered on for the first time in an application.
The two types of power-on reset are shown in and Figure 10-1.
Table 10-1 specifies the performance of the power-on reset feature for the device for both types of power-on reset.
PARAMETER(1) | MIN | MAX | UNIT | ||
---|---|---|---|---|---|
VCC_FT | Fall rate | See Figure 10-1 | 1 | ms | |
VCC_RT | Rise rate | See Figure 10-1 | 0.1 | ms | |
VCC_TRR | Time to re-ramp (when VCC drops to VPOR_MIN – 50 mV or when VCC drops to GND) | See Figure 10-1 | 2 | μs | |
VCC_GH | Level that VCC can glitch down to, but not cause a functional disruption when VCC_GW = 1 µs | See Figure 10-2 | 1.2 | V | |
VCC_GW | Glitch width that does not cause a functional disruption when VCC_GH = 0.5 × VCC (For VCC > 3 V) | See Figure 10-2 | 10 | μs |
Glitches in the power supply can also affect the power-on reset performance of this device. The glitch width (VCC_GW) and height (VCC_GH) are dependent on each other. The bypass capacitance, source impedance, and device impedance are factors that affect power-on reset performance. Figure 10-2 and Table 10-1 provide more information on how to measure these specifications.
VPOR is critical to the power-on reset. VPOR is the voltage level at which the reset condition is released and all the registers and the I2C/SMBus state machine are initialized to their default states. The value of VPOR differs based on the VCC being lowered to or from 0. Figure 10-3 and Table 10-1 provide more details on this specification.