TCAL6416 16-Bit Translating I²C-Bus, SMBus I/O Expander With Interrupt Output, Reset, and Agile I/O Configuration Registers

1 Features

Operating power-supply voltage range of 1.08V to 3.6V
Allows bidirectional voltage-level translation and GPIO expansion between 1.2V, 1.8V, 2.5V, and 3.3V I²C bus and p-ports
Low standby current consumption of 1µA typical at 1.8V
1-MHz fast mode plus I²C bus
Hardware address pin allows two devices on the same I²C, SMBus bus
Active-low reset input (RESET )
Open-drain active-low interrupt output (INT )
Input or output configuration register
Polarity inversion register
Configurable I/O drive strength register
Pull-up and pull-down resistor configuration register
Internal power-on reset
Noise filter on SCL or SDA inputs
Latched outputs with high-current drive maximum capability for directly driving LEDs
Latch-up performance exceeds 100mA per JESD 78, class II
ESD protection exceeds JESD 22
- 4000V Human-body model (A114A)
- 1000V Charged-device model (C101)

2 Applications

Servers
Routers (telecom switching equipment)
Personal computers
Personal electronics
Industrial automation
Gaming consoles
Products with GPIO-limited processors

3 Description

The TCAL6416 device provides general purpose parallel input/output (I/O) expansion for the two-line bidirectional I²C bus (or SMBus) protocol. The device can operate with a power supply voltage ranging from 1.08V to 3.6V on the I²C bus side (V_CCI) and a power supply voltage ranging from 1.08V to 3.6V on the P-port side (V_CCP).

The device supports 100kHz (Standard-mode), 400kHz (Fast-mode), and 1MHz (fast-mode-plus) I²C clock frequencies. I/O expanders such as the TCAL6416 provide a simple solution when additional I/Os are needed for switches, sensors, push-buttons, LEDs, fans, etc.

The TCAL6416 has Agile I/O ports which include additional features designed to enhance the I/O performance in terms of speed, power consumption and EMI. The additional features are: programmable output drive strength, programmable pull-up and pull-down resistors, latchable inputs, maskable interrupt, interrupt status register, and programmable open-drain or push-pull outputs.

Package Information

PART NUMBER	PACKAGE⁽¹⁾	PACKAGE SIZE⁽²⁾
TCAL6416	TSSOP (24)	7.8mm × 6.4mm
	VSSOP (24)	6.1mm x 4.9mm
	WQFN (24)	4mm × 4mm

(1) For all available packages, see the orderable addendum at the end of the data sheet.

(2) The package size (length × width) is a nominal value and includes pins, where applicable.

Simplified Schematic

4 Pin Configuration and Functions

TCAL6416 PW Package, 24-Pin TSSOP
(Top View)

Figure 4-1 PW Package, 24-Pin TSSOP (Top View)

TCAL6416 DGS Package, 24-Pin VSSOP (Top View)

Figure 4-2 DGS Package, 24-Pin VSSOP (Top View)

TCAL6416 RTW Package, 24-Pin WQFN
(Top View)

The exposed center pad must be connected as a secondary ground or left electrically open.

Figure 4-3 RTW Package, 24-Pin WQFN (Top View)

Table 4-1 Pin Functions

PIN				TYPE	DESCRIPTION
NAME	TSSOP (PW)	VSSOP (DGS)	QFN (RTW)	TYPE	DESCRIPTION
INT	1	1	22	O	Interrupt output. Connect to V_CCI or V_CCP through a pull-up resistor
VCCI	2	2	23	—	Supply voltage of I²C bus. Connect directly to the supply voltage of the external I²C controller
RESET	3	3	24	I	Active-low reset input. Connect to V_CCI through a pull-up resistor, if no active connection is used
P00	4	4	1	I/O	P-port input/output (push-pull design structure). At power on, P00 is configured as an input
P01	5	5	2	I/O	P-port input/output (push-pull design structure). At power on, P01 is configured as an input
P02	6	6	3	I/O	P-port input/output (push-pull design structure). At power on, P02 is configured as an input
P03	7	7	4	I/O	P-port input/output (push-pull design structure). At power on, P03 is configured as an input
P04	8	8	5	I/O	P-port input/output (push-pull design structure). At power on, P04 is configured as an input
P05	9	9	6	I/O	P-port input/output (push-pull design structure). At power on, P05 is configured as an input
P06	10	10	7	I/O	P-port input/output (push-pull design structure). At power on, P06 is configured as an input
P07	11	11	8	I/O	P-port input/output (push-pull design structure). At power on, P07 is configured as an input
GND	12	12	9	—	Ground
P10	13	13	10	I/O	P-port input/output (push-pull design structure). At power on, P10 is configured as an input
P11	14	14	11	I/O	P-port input/output (push-pull design structure). At power on, P11 is configured as an input
P12	15	15	12	I/O	P-port input/output (push-pull design structure). At power on, P12 is configured as an input
P13	16	16	13	I/O	P-port input/output (push-pull design structure). At power on, P13 is configured as an input
P14	17	17	14	I/O	P-port input/output (push-pull design structure). At power on, P14 is configured as an input
P15	18	18	15	I/O	P-port input/output (push-pull design structure). At power on, P15 is configured as an input
P16	19	19	16	I/O	P-port input/output (push-pull design structure). At power on, P16 is configured as an input
P17	20	20	17	I/O	P-port input/output (push-pull design structure). At power on, P17 is configured as an input
ADDR	21	21	18	I	Address input. Connect directly to V_CCP or ground
SCL	22	22	19	I	Serial clock bus. Connect to V_CCI through a pull-up resistor
SDA	23	23	20	I/O	Serial data bus. Connect to V_CCI through a pull-up resistor
VCCP	24	24	21	—	Supply voltage of TCAL6416 for P-ports