TPLD801-Q1 has one input and five multifunction I/O pins. GPIO pins can function as either a user defined input, output, or a special function.

Input modes: The following options are available when configuring pins as an input:

• Digital input without Schmitt-trigger
• Digital input with Schmitt-trigger
• Low-voltage digital input

The low-voltage digital input has lower V_IH/V_IL specifications than the digital input without Schmitt trigger. This allows for up-translation from any voltage domain lower than V_CC that meets the low-voltage digital input V_IH and V_IL specifications. The following pins also have the option to serve a special function:

• IO1: external clock input

Output modes: The following options are available with programmable drive strength when configuring pins as an output:

• 1x push-pull output
• 2x push-pull output
• 1x open-drain NMOS output
• 2x open-drain NMOS output
• 1x open-drain PMOS output
• 2x open-drain PMOS output

Pull-up/Pull-down Resistors: All I/O pins have the option of user-selectable resistors that can be connected to the pin structure. The selectable values on these resistors are 10kΩ, 100kΩ and 1MΩ. The internal resistors can be configured as either pull-up or pull-down. When designing in InterConnect Studio, any pin left unused in a design are configured with a 1MΩ pull-down by default. Furthermore, following a power-on event, all ports are in a Hi-Z state until the power-on reset sequence has completed.