SFFS028 June 2022 TMP112-Q1
This section provides a Failure Mode Analysis (FMA) for the pins of the TMP112-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Class | Failure Effects |
---|---|
A | Potential device damage that affects functionality |
B | No device damage, but loss of functionality |
C | No device damage, but performance degradation |
D | No device damage, no impact to functionality or performance |
Figure 4-1 shows the TMP112-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TMP112-Q1 data sheet.
Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
SCL | 1 | SCL stuck low. No I2C communication with device possible. | B |
GND | 2 | No effect. Normal operation. | D |
ALERT | 3 | ALERT stuck low. Non-functionable. False thermal limit will be triggered. | B |
ADD0 | 4 | Limited address selection. Communication could be corrupted. | B |
V+ | 5 | Device unpowered. Device not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
SDA | 6 | SDA stuck low. No I2C communication with device possible. | B |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
SCL | 1 | State of SCL undetermined. No I2C communication with device possible. | B |
GND | 2 | Device functionality undetermined. Device may be unpowered or connect to ground internally through alternate pin ESD diode and power up. | B |
ALERT | 3 | State of ALERT undetermined. False thermal limit can be triggered. | B |
ADD0 | 4 | Limited address selection. Communication could be corrupted. | B |
V+ | 5 | Device functionality undetermined. Device unpowered if all external analog and digital pins are held low. Device may power up through internal ESD diodes to V+ if voltages above the device's power-on reset threshold are present on any of the analog or digital pins. | B |
SDA | 6 | State of SDA undetermined. No I2C communication with device possible. | B |
Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|---|
SCL | 1 | GND | SCL stuck low. No I2C communication with device possible. | B |
GND | 2 | ALERT | If ALERT is low then normal operation. If ALERT is high then device functionality undetermined. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
ALERT | 3 | GND | ALERT stuck low. Non-functionable. False thermal limit will be triggered. | B |
SDA | 4 | V+ | SDA stuck high. No I2C communication with device possible. | B |
V+ | 5 | ADD0 | If ADD0 is intended to be connected to V+ then normal operation. If ADD0 is connected to SDA or SCL then functionality is undetermined. If ADD0 is connected to GND then device unpowered. Device not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
ADD0 | 6 | V+ | Limited address selection. Communication could be corrupted. | B |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
SCL | 1 | SCL stuck high. No I2C communication with device possible. | B |
GND | 2 | Device functionality undetermined. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
ALERT | 3 | ALERT stuck high. Non-functionable. Thermal limit will not be triggered. | B |
ADD0 | 4 | Limited address selection. Communication could be corrupted. | B |
V+ | 5 | No effect. Normal operation. | D |
SDA | 6 | SDA stuck high. No I2C communication with device possible. | B |