SFFS061 February 2021 TLV759P
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a Failure Mode Analysis (FMA) for the pins of the TLV759P. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to Ground (see Table 4-3)
- Pin open-circuited (see Table 4-4)
- Pin short-circuited to an adjacent pin (seeTable 4-5)
- Pin short-circuited to supply (see Table 4-6)
Table 4-3 through Table 4-6 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Table 4-1 TI Classification of Failure
Effects
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality |
| B | No device damage, but loss of functionality |
| C | No device damage, but performance degradation |
| D | No device damage, no impact to functionality or performance |
Figure 4-1 shows the TLV759P pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TLV759P data sheet.
Figure 4-1 Pin Diagram for the TLV759P
DRV Package [6 Pin Adjustable WSON]Table 4-2 Pin Functions
| Pin | I/O | DESCRIPTION | |
|---|---|---|---|
| Name | No. | ||
| OUT | 1 | OUTPUT | Regulated Output |
| FB | 2 | - | Input to the Control Loop Error Amplifier |
| GND | 3 | - | Ground |
| EN | 4 | INPUT | Drive Greater Than VEN(HIGH) to Turn On the Regulator. Drive Less Than VEN(LOW) to Put Regulator in Shutdown Mode |
| DNC | 5 | - | Do Not Connect |
| IN | 6 | INPUT | Inpur Supply |
| Thermal Pad | Pad | - | Connect the thermal pad Ground for Improved Thermal Performance |
Table 4-3 Pin FMA for Device Pins
Short-Circuited to Ground
| Pin | Description of Potential Failure Effect(s) | Failure Effect Class | |
|---|---|---|---|
| Name | No. | ||
| OUT | 1 | Output voltage will be near/at ground - Device will enter current limit. It may cycle in and out of thermal shutdown depending on power dissipation | B |
| FB | 2 | Device will stop regulating. VOUT becomes equal to VIN minus dropout because the pass FET is driven on as hard as possible | B |
| GND | 3 | - | D |
| EN | 4 | Device will turn off | B |
| DNC | 5 | - | D |
| IN | 6 | No Output Voltage. Input Supply can be 0V | B |
Table 4-4 Pin FMA for Device Pins
Open-Circuited
| Pin | Description of Potential Failure Effect(s) | Failure Effect Class | |
|---|---|---|---|
| Name | No. | ||
| OUT | 1 | Output voltage is disconnected from load | B |
| FB | 2 | Error amplifier input is left floating, output voltage will not equal to set voltage and will drift up to VIN minus a dropout voltage | B |
| GND | 3 | Device may disable | B |
| EN | 4 | Device may disable | B |
| DNC | 5 | - | D |
| IN | 6 | No output voltage | B |
Table 4-5 Pin FMA for Device Pins
Short-Circuited to Adjacent Pin
| Pin | Shorted To | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class | |
|---|---|---|---|---|---|
| Name | No. | ||||
| OUT | 1 | FB | 2 | VOUT will be set to VFB = 0.55 Vdc | B |
| FB | 2 | GND | 3 | Device will stop regulating. VOUT becomes equal to VIN minus dropout because the pass FET is driven on as hard as possible | B |
| GND | 3 | EN | 4 | Output is forced OFF, VOUT is 0.0V | B |
| EN | 4 | DNC | 5 | - | D |
| DNC | 5 | IN | 6 | - | D |
| IN | 6 | OUT | 1 | Device will stop regulating. VOUT becomes equal to VIN | B |
Table 4-6 Pin FMA for Device Pins
Short-Circuited to
supply
| Pin | Description of Potential Failure Effect(s) | Failure Effect Class | |
|---|---|---|---|
| Name | No. | ||
| OUT | 1 | Device will stop regulating. VOUT becomes equal to VIN | B |
| FB | 2 | FB pin will be damaged if VIN is higher than 2V | A |
| GND | 3 | Input supply will be driven to GND. No Output Voltage | B |
| EN | 4 | Output is enabled regardless of external control logic on the enable pin | B |
| DNC | 5 | - | D |
| IN | 6 | No Effect | D |