SFFS163 May 2021 DRV8871-Q1
This section provides a Failure Mode Analysis (FMA) for the pins of the DRV8871-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Class | Failure Effects |
---|---|
A | Potential device damage that affects functionality |
B | No device damage, but loss of functionality |
C | No device damage, but performance degradation |
D | No device damage, no impact to functionality or performance |
Figure 4-1 shows the DRV8871-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the DRV8871-Q1 data sheet.
Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
GND | 1 | Intended operation | D |
IN2 | 2 | OUTx driver control will be lost | B |
IN1 | 3 | OUTx driver control will be lost | B |
ILIM | 4 | Current regulation capability will be lost | B |
VM | 5 | Device will not power up | B |
OUT1 | 6 | OUTx HiZ | B |
PGND | 7 | Intended operation | B |
OUT2 | 8 | OUTx HiZ | B |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
GND | 1 | Device will not power up | B |
IN2 | 2 | OUTx driver control will be lost | B |
IN1 | 3 | OUTx driver control will be lost | B |
ILIM | 4 | Current regulation capability will be lost | B |
VM | 5 | Device will not power up | B |
OUT1 | 6 | OUT1 driver control will be lost | B |
PGND | 7 | OUT1 and OUT2 driver control will be lost | B |
OUT2 | 8 | OUT2 driver control will be lost | B |
Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|---|
GND | 1 | IN2 | OUTx driver control will be lost | B |
IN2 | 2 | IN1 | OUTx driver control will be lost | B |
IN1 | 3 | ILIM | OUTx driver control will be lost, current regulation capability will be lost | B |
ILIM | 4 | VM | Low voltage pin max voltage violated | A |
VM | 5 | OUT1 | OUTx HiZ | B |
OUT1 | 6 | PGND | Low voltage pin max voltage violated | A |
PGND | 7 | OUT2 | Low voltage pin max voltage violated | A |
OUT2 | 8 | GND | OUTx HiZ | B |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
GND | 1 | Device will not power up | B |
IN2 | 2 | Low voltage pin max voltage violated | A |
IN1 | 3 | Low voltage pin max voltage violated | A |
ILIM | 4 | Low voltage pin max voltage violated | A |
VM | 5 | Intended operation | D |
OUT1 | 6 | OUTx HiZ | B |
PGND | 7 | Low voltage pin max voltage violated | A |
OUT2 | 8 | OUTx HiZ | B |