SFFS218 December 2021 CDCE913-Q1
The failure mode distribution estimation for CDCE913-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.
The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.
| Die Failure Modes | Failure Mode Distribution (%) |
|---|---|
| Performance degradation of output clocks | 45% |
| Incorrect output frequencies, poor timing accuracy | 40% |
| Part in undefined state due to incorrect startup/power-on reset | 10% |
| Loss of I2C communication | 5% |