SFFS237 August 2022 HDC3020-Q1

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the HDC3020-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Pin short-circuited to Ground (see Table 4-2)
Pin open-circuited (see Table 4-3)
Pin short-circuited to an adjacent pin (see Table 4-4)
Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects

Class	Failure Effects
A	Potential device damage that affects functionality
B	No device damage, but loss of functionality
C	No device damage, but performance degradation
D	No device damage, no impact to functionality or performance

Figure 4-1 shows the HDC3020-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the HDC3020-Q1 data sheet.

Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

Device is the only slave on the I2C bus
External pullup resistor on SCL/SDA pins

Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
SDA	1	SDA stuck low. No I2C communication with device possible.	B
ADDR	2	Limited address selection. Communication could be corrupted.	B
ALERT	3	ALERT stuck low. Non-functionable. No thermal limit will be triggered.	B
SCL	4	SCL stuck low. No I2C communication with device possible.	B
VDD	5	Device unpowered. Device not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible.	A
RESET	6	RESET stuck low. Non-functionable.	B
ADDR1	7	Limited address selection. Communication could be corrupted.	B
GND	8	No effect. Normal operation.	D

Table 4-3 Pin FMA for Device Pins Open-Circuited

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
SDA	1	State of SDA undetermined. No I2C communication with device possible.	B
ADDR	2	Limited address selection. Communication could be corrupted.	B
ALERT	3	ALERT pin can be left floating if not used.	B
SCL	4	State of SCL undetermined. No I2C communication with device possible.	B
VDD	5	Device functionality undetermined. Device unpowered if all external analog and digital pins are held low. Device may power up through internal ESD diodes to VDD if voltages above the device's power-on reset threshold are present on any of the analog or digital pins.	B
RESET	6	RESET can be left floating if not used.	B
ADDR1	7	Limited address selection. Communication could be corrupted.	B
GND	8	Device functionality undetermined. Device may be unpowered or connect to ground internally through alternate pin ESD diode and power up.	B

Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin

Pin Name	Pin No.	Shorted to	Description of Potential Failure Effect(s)	Failure Effect Class
SDA	1	ADDR	I2C communication corrupted. No I2C communication with device possible.	B
ADDR	2	ALERT	Not operational. Address detection will be corrupted.	B
ALERT	3	SCL	Not operational. False ALERT can be triggered.	B
SCL	4	ALERT	I2C communication corrupted. No I2C communication with device possible.	B
VDD	5	RESET	Device functionality undetermined. Device unpowered if RESET pin is held low. Device may power up through internal ESD diodes to VDD if voltages above the device's power-on threshold is present on RESET pin.	B
RESET	6	ADDR1	Not operational. RESET may not be able to be used properly.	B
ADDR1	7	RESET	Not operational. Address detection will be corrupted.	B
GND	8	ADDR1	If ADDR1 is low then normal operation. If ADDR1 is high then device functionality undetermined. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible.	A

Table 4-5 Pin FMA for Device Pins Short-Circuited to supply

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
SDA	1	SDA stuck high. No I2C communication with device possible.	B
ADDR	2	Limited address selection. Communication could be corrupted.	B
ALERT	3	ALERT stuck high. Non-functionable. False thermal limit can be triggered.	B
SCL	4	SCL stuck high. No I2C communication with device possible.	B
VDD	5	No effect. Normal operation.	D
RESET	6	RESET can be tied to VDD if not used.	B
ADDR1	7	Limited address selection. Communication could be corrupted.	B
GND	8	Device functionality undetermined. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible.	A