SFFS240A August   2022  – October 2022 TPS55288-Q1 , TPS552882-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
  6. 5Revision History

Failure Mode Distribution (FMD)

The failure mode distribution estimation for the TPS55288-Q1 and TPS552882-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.

Table 3-1 Die Failure Modes and Distribution
Die Failure Modes Failure Mode Distribution (%)
VO not in specification voltage or timing 50%
VO No output GND or HIZ 15%
SW FETs stuck on 25%
EN enable fails or false enable 5%
Short circuit any two pins 5%