SFFS557 March 2023 ADS1113-Q1
4.2 UQFN Package
Figure 4-2 shows the ADS1113-Q1 pin diagram for the UQFN package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the ADS1113-Q1 data sheet.
Figure 4-2 Pin Diagram (UQFN Package)Table 4-6 Pin FMA for Device Pins
Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| ADDR | 1 | Pullup resistor on the ADDR pin to VDD: ADDR is stuck low. No I2C communication with the device is possible because of change in I2C address configuration. | B |
| Pulldown resistor on the ADDR pin to GND: ADDR is stuck low. No effect. Normal operation. | D | ||
| NC | 2 | No effect. Normal operation. | D |
| GND | 3 | No effect. Normal operation. | D |
| AIN0 | 4 | AIN0 is stuck low. Conversion results for multiplexer channel combinations using AIN0 are corrupted, unless AIN0 is tied to GND anyway. | B |
| AIN1 | 5 | AIN1 is stuck low. Conversion results for multiplexer channel combinations using AIN1 are corrupted, unless AIN1 is tied to GND anyway. | B |
| NC | 6 | No effect. Normal operation. | D |
| NC | 7 | No effect. Normal operation. | D |
| VDD | 8 | The device is unpowered and not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage is plausible. | A |
| SDA | 9 | SDA is stuck low. No I2C communication with the device is possible. | B |
| SCL | 10 | SCL is stuck low. No I2C communication with the device is possible. | B |
Table 4-7 Pin FMA for Device Pins
Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| ADDR | 1 | The state of the ADDR input is undetermined. The I2C address of the device is undetermined. I2C communication with the device is not possible if the host assumes a different I2C address than the device is set to. | B |
| NC | 2 | No effect. Normal operation. | D |
| GND | 3 | Device functionality is undetermined. The device can be unpowered or connected to ground internally through an alternate pin ESD diode and power up. | B |
| AIN0 | 4 | The state of the AIN0 input is undetermined. Conversion results for multiplexer channel combinations using AIN0 are undetermined. | B |
| AIN1 | 5 | The state of the AIN1 input is undetermined. Conversion results for multiplexer channel combinations using AIN1 are undetermined. | B |
| NC | 6 | No effect. Normal operation. | D |
| NC | 7 | No effect. Normal operation. | D |
| VDD | 8 | Device functionality is undetermined. The device is unpowered if all external analog and digital pins are held low. The device can power up through internal ESD diodes to VDD if voltages above the device power-on reset threshold are present on any of the analog or digital pins. | B |
| SDA | 9 | No I2C communication with the device is possible. | B |
| SCL | 10 | No I2C communication with the device is possible. | B |
Table 4-8 Pin FMA for Device Pins
Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|---|
| ADDR | 1 | NC | No effect. Normal operation. | D |
| NC | 2 | GND | No effect. Normal operation. | D |
| GND | 3 | AIN0 | AIN0 is stuck low. Conversion results for multiplexer channel combinations using AIN0 are corrupted, unless AIN0 is tied to GND anyway. | B |
| AIN0 | 4 | AIN1 | Conversion results for multiplexer channel combinations using AIN0 or AIN1 are undetermined. | B |
| AIN1 | 5 | NC | No effect. Normal operation. | D |
| NC | 6 | NC | No effect. Normal operation. | D |
| NC | 7 | VDD | No effect. Normal operation. | D |
| VDD | 8 | SDA | SDA is stuck high. No I2C communication with the device is possible. High SDA input current when the device tries to drive SDA low. Device damage is plausible. | A |
| SDA | 9 | SCL | I2C communication is corrupted. No I2C communication with the device is possible. | B |
| SCL | 10 | ADDR | I2C communication corrupted. No I2C communication with the device is possible. | B |
Table 4-9 Pin FMA for Device Pins
Short-Circuited to VDD
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| ADDR | 1 | Pullup resistor on the ADDR pin to VDD: ADDR is stuck high. No effect. Normal operation. | D |
| Pulldown resistor on the ADDR pin to GND: ADDR is stuck high. No I2C communication with the device is possible because of change in I2C address configuration. | B | ||
| NC | 2 | No effect. Normal operation. | D |
| GND | 3 | The device is unpowered and not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage is plausible. | A |
| AIN0 | 4 | AIN0 is stuck high. Conversion results for multiplexer channel combinations using AIN0 are corrupted, unless AIN0 is tied to VDD anyway. | B |
| AIN1 | 5 | AIN1 is stuck high. Conversion results for multiplexer channel combinations using AIN1 are corrupted, unless AIN1 is tied to VDD anyway. | B |
| NC | 6 | No effect. Normal operation. | D |
| NC | 7 | No effect. Normal operation. | D |
| VDD | 8 | No effect. Normal operation. | D |
| SDA | 9 | SDA is stuck high. No I2C communication with the device is possible. High SDA input current when the device tries to drive SDA low. Device damage is plausible. | A |
| SCL | 10 | SCL is stuck high. No I2C communication with the device is possible. | B |