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This document contains information for OPA333-Q1 (SOT-23 package) to aid in a functional safety system design. Information provided are:
Figure 1-1 shows the device functional block diagram for reference.
OPA333-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.
This section provides Functional Safety Failure In Time (FIT) rates for OPA333-Q1 based on two different industry-wide used reliability standards:
FIT IEC TR 62380 / ISO 26262 | FIT (Failures Per 109 Hours) |
---|---|
Total Component FIT Rate | 4 |
Die FIT Rate | 2 |
Package FIT Rate | 2 |
The failure rate and mission profile information in Table 2-1 comes from the Reliability data handbook IEC TR 62380 / ISO 26262 part 11:
Table | Category | Reference FIT Rate | Reference Virtual TJ |
---|---|---|---|
5 | CMOS, BICMOS Digital, analog / mixed | 20 FIT | 55°C |
The Reference FIT Rate and Reference Virtual TJ (junction temperature) in Table 2-2 come from the Siemens Norm SN 29500-2 tables 1 through 5. Failure rates under operating conditions are calculated from the reference failure rate and virtual junction temperature using conversion information in SN 29500-2 section 4.
The failure mode distribution estimation for OPA333-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.
The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.
Die Failure Modes | Failure Mode Distribution (%) |
---|---|
Output open (Hi-Z) | 20% |
Output saturated high | 25% |
Output saturated high | 25% |
Output functional, not in specification voltage or timing | 30% |
This section provides a Failure Mode Analysis (FMA) for the pins of the OPA333-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Class | Failure Effects |
---|---|
A | Potential device damage that affects functionality |
B | No device damage, but loss of functionality |
C | No device damage, but performance degradation |
D | No device damage, no impact to functionality or performance |
Figure 4-1 shows the OPA333-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the OPA333-Q1 data sheet.
Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
OUT | 1 | Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the OUT voltage ultimately forced to the GND voltage. Prolonged exposure to short-circuit conditions can result in long-term reliability issues. | A |
+IN | 3 | Device common-mode is tied to the negative rail. Depending on the circuit configuration, the output likely does not respond due to the device in an invalid common-mode condition. | C |
VCC | 4 | Op-amp supplies are shorted together, leaving the VCC pin at some voltage between the VCC and GND sources (depending on the source impedance). | A |
‒IN | 5 | The device does not receive negative feedback. Depending on the circuit configuration, the output most likely moves to the negative supply. | B |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
OUT | 1 | No negative feedback or ability for OUT to drive the application. | B |
GND | 2 | Negative supply is left floating. The op amp ceases to function due to inability to source or sink current to the device. | B |
+IN | 3 | Device common-mode is disconnected. The op amp is not provided with common-mode bias, and the device output likely ends up at the positive or negative rail. The +IN pin voltage likely ends up at the positive or negative rail due to leakage on the ESD diodes. | B |
VCC | 4 | Positive supply is left floating. The op amp ceases to function due to inability to source or sink current to the device. | A |
‒IN | 5 | Inverting pin of the op amp is left floating. Negative feedback is not provided to the device, likely resulting in the device output moving between the positive and negative rails. The ‒IN pin voltage likely ends up at the positive or negative rail due to leakage on the ESD diodes. | B |
Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|---|
OUT | 1 | 2 | Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the OUT voltage ultimately forced to the GND voltage. Prolonged exposure to short-circuit conditions can result in long-term reliability issues. | A |
GND | 2 | 3 | Device common-mode is tied to the negative rail. Depending on the circuit configuration, the output likely does not respond due to the device in an invalid common-mode condition. | C |
+IN | 3 | 4 | Depending on the circuit configuration, the application is likely not to function due to device common-mode voltage connected to +IN. | B |
VCC | 4 | 5 | The device does not receive negative feedback. Depending on the noninverting input voltage and circuit configuration, the output most likely moves to the negative supply. | B |
‒IN | 5 | 1 | Depending on the circuit configuration, the circuit gain is reduced to unity gain, and the application might not function as intended. | B |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
OUT | 1 | Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the OUT voltage ultimately forced to the VCC voltage. Prolonged exposure to short-circuit conditions can result in long-term reliability issues. | A |
GND | 2 | Op-amp supplies are shorted together, leaving the GND pin at some voltage between the GND and VCC sources (depending on the source impedance). | A |
+IN | 3 | Depending on the circuit configuration, the application is likely not to function due to device common-mode voltage connected to +IN. | B |
‒IN | 5 | The device does not receive negative feedback. Depending on the noninverting input voltage and circuit configuration, the output most likely moves to the negative supply. | B |
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