Figure 6-4 gives an
overview of the BISTs used to monitor and diagnose the video processing blocks in
the DLPC231S-Q1.
- [SM_5] Front-End Functional
Test (FEFT): Checks the video processing blocks in the DLPC231S-Q1 by inserting a test pattern data and
performing a CRC check on the output of processing blocks. The test pattern is a
1920x608 horizontal ramp pattern with an overlaid random noise pattern. The size
of the image is chosen in order to provide full coverage of the memory control.
Two frames of ~120Hz data are tested. This provides a high source pixel clock
frequency, in order to stress internal logic. A subset of the image is used for
a CRC check. If the CRC after processing does not match the expected CRC, the
test fails. This test can be configured to run at start-up, and it can be
executed by command after the software is changed to Stand-by mode via host
command. In case of test failure, software will not transition Display Mode even
if it is commanded by the host. An error will also be logged.
- [SM_6] Back-End Functional
Test (BEFT): Checks the DLPC231S-Q1 blocks
responsible for outputting data from the frame buffers to the DMD driver. This
checks functionality such as image flips, smooth image transition functions, and
frame buffer swaps. Additionally, functionality related to the synchronization
of the video with LEDs is tested. This will be discussed in more detail in Section 6.3.2. This test checks a 160x60 image with four configurations—no flip, East/West
flip only, North/South flip only, and East/West plus North/South flip. The image
size is small in order to increase test speed. The goal of this test is not to
provide full coverage of the frame buffers, because that coverage is already
provided by other tests. A CRC check is performed on the image after formatting.
If the resulting CRC does not match the expected value, the test fails. This
test can be configured to run at start-up, and it can be executed by command
after the software is changed to Stand-by mode via host command. In case of test
failure, software will not transition to Display Mode even if it is commanded by
the host. An error will also be logged.
- [SM_7] DLPC231S-Q1 Memory BIST: Checks functionality of internal
memories such as the frame buffers, internal RAM, and sequence look up tables
using a series of writes, delays, and reads. The frame buffer memory check is
critical for diagnosing a corrupt video path. The SRAM frame buffers are tested
using a series of instructions provided by the manufacturer of the SRAM cell.
The instructions for executing the test are stored in external flash, but the
test data is generated locally in the frame buffer. If the data read from the
memory does not match the data written to the memory the test fails. This test
can be configured to run at start-up, and it can be executed by command after
the software is changed to Stand-by mode via host command. In case of test
failure, software will not transition to Display Mode even if it is commanded by
the host. An error will also be logged.