SFFS832 September   2024 UCC27301A-Q1 , UCC27311A-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOIC Package
    2. 2.2 VSON Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOIC Package
    2. 4.2 VSON Package

3 Failure Mode Distribution (FMD)

The failure mode distribution estimation for the UCC273x1A-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity, and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures resulting from misuse or overstress.

Table 3-1 UCC27301A-Q1 VSON Die Failure Modes and Distribution
Die Failure Modes Failure Mode Distribution (%)
HS stuck high 16.5
LO stuck high 16.5
HS stuck low 16.5
LO stuck low 16.5
HS unknown or outside of specified range 16.5
LS unknown or outside of specified range 16.5
UVLO not functional <1
EN not functional <1
Others <1
Table 3-2 UCC27311A-Q1 VSON Die Failure Modes and Distribution
Die Failure Modes Failure Mode Distribution (%)
HS stuck high 16.5
LO stuck high 16.5
HS stuck low 16.5
LO stuck low 16.5
HS unknown or outside of specified range 16.5
LS unknown or outside of specified range 16.5
UVLO not functional <1
EN not functional <1
Others <1
Table 3-3 UCC27301A-Q1 SOIC Die Failure Modes and Distribution
Die Failure Modes Failure Mode Distribution (%)
HS stuck high 16.5
LO stuck high 16.5
HS stuck low 16.5
LO stuck low 16.5
HS unknown or outside of specified range 16.5
LS unknown or outside of specified range 16.5
UVLO not functional <1
Others <1