SFFS858 December   2024 LMR60410

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
  7. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the LMR60406, LMR60406-Q1, LMR60410, and LMR60410-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Figure 4-1 shows the LMR60406, LMR60406-Q1, LMR60410, and LMR60410-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the LMR60406, LMR60406-Q1, LMR60410, and LMR60410-Q1 data sheet.

LMR60410-Q1, LMR60406-Q1, LMR60410, LMR60406 Pin Diagram Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • The application circuit is used according to the LMR60406, LMR60406-Q1, LMR60410, and LMR60410-Q1 data sheets.
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
VIN 1 VOUT = 0V. B
PGND 2 VOUT is normal. D
SW 3 Damage to high-side FET. A
BOOT 4 VOUT = 0V. High-side FET does not turn on. B
PG 5 When not in use, this pin can be left grounded (PG is not a valid signal and VOUT is normal). D
FB 6 When in adjustable output mode, VOUT approaches VIN. When in fixed output mode, VOUT = 0V. B
MODE/SYNC 7 Device switches in AUTO mode. VOUT is normal. D
RT 8 Device stops switching until short to GND is removed. B
EN 9 VOUT = 0V. Enable is below the VEN-TH and functionality is halted. D
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
VIN1VOUT = 0V.B
PGND2VOUT can be abnormal. C
SW3VOUT = 0V.B
BOOT 4 VOUT = 0V. High-side FET does not turn on. B
PG 5 When not in use, this pin can be left open (PGOOD is not a valid signal and VOUT is normal). D
FB 6 VOUT approaches VIN. C
MODE/SYNC 7 Mode of operation can toggle between AUTO and FPWM. C
RT 8 Internal clock does not operate properly and the part does not switch. B
EN 9 Pin cannot be left floating. Device potentially does not enable. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure EffectsFailure Effect Class
VIN1PGNDVOUT = 0V.B
PGND2SWDamage to high-side FET. A
SW3BOOTVOUT = 0V, high-side FET does not turn on and there is not CBOOT.B
BOOT 4 PG PG damage occurs if BOOT voltage is greater than PG absolute maximum voltage. B
PG 5 FB In fixed output mode, VOUT = 0V. In adjustable mode, if a short happens before soft state is complete, output voltage approaches input voltage supply. B
FB 6 PGND In fixed output mode, VOUT = 0V. In adjustable output mode, output voltage approaches the input voltage supply. B
MODE/SYNC 7 RT Device operates in FPWM. D
RT 8 EN Internal clock does not switch at the correct frequency. C
EN 9 VIN Device is enabled once the voltage between VIN and PGND is greater than VINUVLO(R). D
Table 4-5 Pin FMA for Device Pins Short-Circuited to Supply
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
VIN 1 VOUT is normal. D
PGND 2 VOUT = 0V. B
SW 3 Damage to low-side FET. A
BOOT 4 Damage occurs to BOOT ESD. A
PG 5 If supply voltage is greater than 20V, damage occurs to PGOOD pin. A
FB 6 If supply voltage is greater than 16V, damage occurs. A
MODE/SYNC 7 Device operates in FPWM. D
RT 8 Internal clock does not switch at the correct frequency. C
EN 9 VOUT is normal. D